summaryrefslogtreecommitdiff
path: root/src/mem
AgeCommit message (Expand)Author
2014-03-20ruby: garnet: convert network interfaces into clocked objectsNilay Vaish
2014-03-20ruby: slicc: code refactorNilay Vaish
2014-03-20ruby: no piobus in se modeNilay Vaish
2014-03-17ruby: remove some of the unnecessary codeNilay Vaish
2014-03-07mem: Fix incorrect assert failure in the CachePrakash Ramrakhyani
2014-03-07mem: Wakeup sleeping CPUs without caches on LLSCAli Saidi
2014-03-01ruby: message buffer: changes related to tracking push/pop timesNilay Vaish
2014-03-01ruby: make the max_size variable of the MessageBuffer unsignedNilay Vaish
2014-03-01ruby: profiler: statically allocate stats variableNilay Vaish
2014-02-23ruby: route all packets through ruby portNilay Vaish
2014-02-23ruby: Simplify RubyPort flow control and routingAndreas Hansson
2014-02-23ruby: message buffer: refactor codeNilay Vaish
2014-02-23ruby: remove few not required #includesNilay Vaish
2014-02-23ruby: slicc: remove unused COPY_HEAD functionalityNilay Vaish
2014-02-23ruby: protocols: remove unused action z_stallNilay Vaish
2014-02-21ruby: network: move message buffers to base network class.Nilay Vaish
2014-02-21ruby: network: garnet: fixed: removes net_ptr from linksNilay Vaish
2014-02-21ruby: cache: remove not required variable m_cache_nameNilay Vaish
2014-02-20ruby: network: garnet: fixed: removes next cycle functionsNilay Vaish
2014-02-20ruby: controller: slight code refactoringNilay Vaish
2014-02-20ruby: mesi three level: rename incorrectly named filesNilay Vaish
2014-02-20ruby: network: removes unused code.Nilay Vaish
2014-02-20ruby: slicc: slight code refactoringNilay Vaish
2014-02-20ruby: message buffer: removes some unecessary functions.Nilay Vaish
2014-02-18mem: Fix bug in PhysicalMemory use of mmap and munmapAndreas Hansson
2014-02-18mem: Filter cache snoops based on address rangesAndreas Hansson
2014-02-18mem: Add a wrapped DRAMSim2 memory controllerAndreas Hansson
2014-02-18mem: Fix input to DPRINTF in CommMonitorAndreas Hansson
2014-02-06ruby: memory controller: use MemoryNode *Nilay Vaish
2014-01-29mem: Add additional tolerance to stride prefetcherMitch Hayenga
2014-01-29mem: Allowed tagged instruction prefetching in stride prefetcherMitch Hayenga
2014-01-29mem: prefetcher: add options, support for unaligned addressesMitch Hayenga ext:(%2C%20Amin%20Farmahini%20%3Caminfar%40gmail.com%3E)
2014-01-28mem: Remove redundant findVictim() input argumentAmin Farmahini
2014-01-28mem: Fixes a bug in simple_dram write mergingAmin Farmahini
2014-01-24cpu: Add support for instructions that zero cache lines.Ali Saidi
2014-01-24mem: Add flag to request if it was generated by a page table walkGiacomo Gabrielli
2014-01-24mem: Add support for a security bit in the memory systemGiacomo Gabrielli
2014-01-24Cache: Collect very basic stats on tag and data accessesTimothy M. Jones
2014-01-24mem: per-thread cache occupancy and per-block agesDam Sunwoo
2014-01-24mem: track per-request latencies and access depths in the cache hierarchyMatt Horsnell
2014-01-17ruby: remove unused label no_vectorNilay Vaish
2014-01-10ruby: move all statistics to stats.txt, eliminate ruby.statsNilay Vaish
2014-01-09ruby: fix bug introduced to revision 8523754f8885Nilay Vaish
2014-01-08ruby: slicc: remove variable 'addr' used in calls to doTransitionNilay Vaish
2014-01-04ruby: add a three level MESI protocol.Nilay Vaish
2014-01-04ruby: rename MESI_CMP_directory to MESI_Two_LevelNilay Vaish
2014-01-04ruby: add support for clustersNilay Vaish
2014-01-04ruby: some small changesNilay Vaish
2013-12-26ruby: fix bugs in mesi cmp directory protocolNilay Vaish
2013-12-20ruby: slicc: replace max_in_port_rank with number of inportsNilay Vaish