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2008-01-06Temporary fix for ll/sc bug see flyspray task for more info:Geoffrey Blake
http://www.m5sim.org/flyspray/task/197 Signed-off by: Ali Saidi <saidi@eecs.umich.edu> --HG-- extra : convert_revision : cdeece7e3163de9abf2c6c7435f1bc93570fab81
2008-01-02Add ReadRespWithInvalidate to handle multi-level coherence situationSteve Reinhardt
where we defer a response to a read from a far-away cache A, then later defer a ReadExcl from a cache B on the same bus as us. We'll assert MemInhibit in both cases, but in the latter case MemInhibit will keep the invalidation from reaching cache A. This special response tells cache A that it gets the block to satisfy its read, but must immediately invalidate it. --HG-- extra : convert_revision : f85c8b47bb30232da37ac861b50a6539dc81161b
2008-01-02Mark cache-to-cache MSHRs as downstreamPending when necessary.Steve Reinhardt
Don't mark upstream MSHR as pending if downstream MSHR is already in service. --HG-- extra : convert_revision : e1c135ff00217291db58ce8a06ccde34c403d37f
2008-01-02Don't DPRINTF in the middle of a PrintReq.Steve Reinhardt
--HG-- extra : convert_revision : 6358c014d14a19a34111c39827b05987507544bb
2008-01-02Bug fix: functional cache port now needs otherPort set.Steve Reinhardt
--HG-- extra : convert_revision : fb007df73a77535a5dba19341f7b0b32e8c99548
2008-01-02Additional comments and helper functions for PrintReq.Steve Reinhardt
--HG-- extra : convert_revision : 7eadf9b7db8c0289480f771271b6efe2400006d4
2008-01-02Add functional PrintReq command for memory-system debugging.Steve Reinhardt
--HG-- extra : convert_revision : 73b753e57c355b7e6873f047ddc8cb371c3136b7
2008-01-02Fix formatting and comments in cache_impl.hhSteve Reinhardt
--HG-- extra : convert_revision : 26d71cca5420ad03e16bf174e15dabe7f902da41
2007-11-28Make ports that aren't connected to anything fail more gracefully.Gabe Black
--HG-- extra : convert_revision : 3803b28fb2fdfd729f01f1a44df2ae02ef83a2fc
2007-11-19Memory: Cache the physical memory start and size so we don't need a dynamic ↵Ali Saidi
cast on every access. --HG-- extra : convert_revision : d6c3e93718991e7b68248242c80d8e6ac637ac51
2007-11-16Tweak check for writable block fill.Steve Reinhardt
--HG-- extra : convert_revision : c04281bcfc4cd23c7613aeccb21dc74452bcc951
2007-11-16Fix bug on exclusive response to ReadReq with pending WriteReq.Steve Reinhardt
--HG-- extra : convert_revision : 5429cd7ca84cf6348813a4607fa16f76aa5df7e0
2007-11-15branch mergeKorey Sewell
--HG-- extra : convert_revision : 1c56f3c6f2c50d642d2de5ddde83a55234455cec
2007-11-14Checkpointing: Name SE page table entries better so that there isn't a ↵Ali Saidi
problem if multiple workloads are being run at once. --HG-- extra : convert_revision : 3bac9bd7fd93fcadf764e2991c5b029f2c745c08
2007-11-14remove unnecessary debug messages I addedKorey Sewell
--HG-- extra : convert_revision : 5c23218fd1b899fa7fe42701f7cb2f6033f7a583
2007-11-13Add in files from merge-bare-iron, get them compiling in FS and SE modeKorey Sewell
--HG-- extra : convert_revision : d4e19afda897bc3797868b40469ce2ec7ec7d251
2007-11-04Cache: Fix for OS X 10.5 compiling.Ali Saidi
--HG-- extra : convert_revision : ba3c33ed524367280eefc096177d767168ac2cf6
2007-11-01DRAM: Make latency parameters be Param.Latency instead of ints.Ali Saidi
--HG-- extra : convert_revision : 553b86cc4653da089d7aa0045a3f3bdcabf6c4d8
2007-10-31Merge in bus DPRINTF changes.Steve Reinhardt
--HG-- extra : convert_revision : 3bbd7c0745b31bb2a628b604ab1627cd9c61643c
2007-10-31Traceflags: Add SCons function to created a traceflag instead of having one ↵Ali Saidi
file with them all. --HG-- extra : convert_revision : 427f6bd8f050861ace3bc0d354a1afa5fc8319e6
2007-10-25TLB: Fix serialization issues with the tlb entries and make the page table ↵Gabe Black
store the process, not the system. --HG-- extra : convert_revision : 2421af11f62f60fb48faeee6bddadac2987df0e8
2007-10-25SE: Fix page table and system serialization, don't reinit process if this is ↵Ali Saidi
a checkpoint restore. --HG-- extra : convert_revision : 03dcf3c088e57b7abab60efe700d947117888306
2007-09-16mem: clean up bus/cache DPRINTFs a bitSteve Reinhardt
Not so much noise on failed sends, and more complete info when grepping a trace using an address. --HG-- extra : convert_revision : 05a8261c9452072ca08b906200c6322b33e2b9f1
2007-09-05Bus: Fix drain code; old method could return 1 in atomic mode and never call ↵Ali Saidi
de->process(). --HG-- extra : convert_revision : 35990e5eaf93f7a95a0ec72e9f92034a042def3e
2007-08-30params: Deprecate old-style constructors; update most SimObject constructors.Miles Kaufmann
SimObjects not yet updated: - Process and subclasses - BaseCPU and subclasses The SimObject(const std::string &name) constructor was removed. Subclasses that still rely on that behavior must call the parent initializer as : SimObject(makeParams(name)) --HG-- extra : convert_revision : d6faddde76e7c3361ebdbd0a7b372a40941c12ed
2007-08-26Merge with headGabe Black
--HG-- extra : convert_revision : cc73b9aaf73e9dacf52f3350fa591e67ca4ccee6
2007-08-26Address translation: Make the page table more flexible.Gabe Black
The page table now stores actual page table entries. It is still a templated class here, but this will be corrected in the near future. --HG-- extra : convert_revision : 804dcc6320414c2b3ab76a74a15295bd24e1d13d
2007-08-12MemorySystem: Fix the use of ?: to produce correct results.Ali Saidi
--HG-- extra : convert_revision : 31aad7170b35556a4c984f4ebc013137d55d85eb
2007-08-10DMA: Add IOCache and fix bus bridge to optionally only send requests oneAli Saidi
way so a cache can handle partial block requests for i/o devices. --HG-- extra : convert_revision : a68b5ae826731bc87ed93eb7ef326a2393053964
2007-08-10Bus: Only call end() on an stl object once in a loopAli Saidi
--HG-- extra : convert_revision : 238dcd6da7577b533e52ada2107591c4e9168ebd
2007-08-08Port, StaticInst: Revert unnecessary changes.Vincentius Robby
--HG-- extra : convert_revision : e6ef262bbbc5ad53498e55caac1897e6cc2a61e6
2007-08-08alpha: Make the TLB cache to actually work.Vincentius Robby
Improve MRU checking for StaticInst, Bus, TLB --HG-- extra : convert_revision : 9116b5655cd2986aeb4205438aad4a0f5a440006
2007-08-04port: Implement cache for port interfaces and rangesVincentius Robby
--HG-- extra : convert_revision : d7cbec7c277fb8f4d8846203caae36ce629602d5
2007-08-03cache: get rid of obsolete params from python.Steve Reinhardt
--HG-- extra : convert_revision : cd40e0ef938ef6da1cccedf7be01c3ac5b4883fb
2007-07-29memory system: fix functional access bug.Steve Reinhardt
Make sure not to keep processing functional accesses after they've been responded to. Also use checkFunctional() return value instead of checking packet command field where possible, mostly just for consistency. --HG-- extra : convert_revision : 29fc76bc18731bd93a4ed05a281297827028ef75
2007-07-29bus: take out response prioritization (timing was messed up).Steve Reinhardt
Also make express snoops not occupy bus (since they're magic). --HG-- extra : convert_revision : 75aa5211a59380026d1e3f122778425e48e2edcd
2007-07-27packet: get rid of unused intersect() function.Steve Reinhardt
--HG-- extra : convert_revision : f0a2947ccc49e0d18bc17a59371fa396d9ebd6c0
2007-07-27cache/memtest: fixes for functional accesses.Steve Reinhardt
--HG-- extra : convert_revision : 688ba4d882cad2c96cf44c9e46999f74266e02ee
2007-07-27cache: Get rid of unused variable.Steve Reinhardt
--HG-- extra : convert_revision : 394adc12fbd7ea10280a1b8d6bc3cb15ee019f27
2007-07-26Merge python and x86 changes with cache branchNathan Binkert
--HG-- extra : convert_revision : e06a950964286604274fba81dcca362d75847233
2007-07-26Have owner respond to UpgradeReq to avoid race.Steve Reinhardt
--HG-- extra : convert_revision : 30916fca6978c73d8a14558f2d7288c1eab54ad4
2007-07-26Add downward express snoops for invalidations.Steve Reinhardt
--HG-- extra : convert_revision : 4916fa9721d727d8416ad8c07df3a8171d02b2b4
2007-07-26Continue snooping after a writeback is encountered.Steve Reinhardt
--HG-- extra : convert_revision : 8411338a6c0fdd7072dd32bdffacdace62d5de90
2007-07-26bus: Fix default port handling.Steve Reinhardt
--HG-- extra : convert_revision : 121b6e31cddff17c51fc4f3df20e7e2bde87d04f
2007-07-25Can't block on memInhibit packetsSteve Reinhardt
(now that bus no longer filters them for us). --HG-- extra : convert_revision : 34e7eaf5ee1e739f5557a2d417e569ed2ceb14b3
2007-07-24Integrate snoop loop functions into their respective call sites.Steve Reinhardt
Also some additional cleanup of Bus::recvTiming(). --HG-- extra : convert_revision : 156814119f75d04c2e954aec2d7ed6fdc186c26f
2007-07-24Don't delete request at target... requester still needs it.Steve Reinhardt
--HG-- extra : convert_revision : 76377ca2e4d7ea70d1d54d325a63ce710e260b93
2007-07-23A couple more minor bug fixes for multilevel coherence.Steve Reinhardt
--HG-- extra : convert_revision : 370f9e34911157765be6fd49e826fa1af589b466
2007-07-23Major changes to how SimObjects are created and initialized. Almost allNathan Binkert
creation and initialization now happens in python. Parameter objects are generated and initialized by python. The .ini file is now solely for debugging purposes and is not used in construction of the objects in any way. --HG-- extra : convert_revision : 7e722873e417cb3d696f2e34c35ff488b7bff4ed
2007-07-22Replace lowerMSHRPending flag with more robust schemeSteve Reinhardt
based on following Packet senderState links. --HG-- extra : convert_revision : 9027d59bd7242aa0e4275bf94d8b1fb27bd59d79
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-06 07:09:16 +0000