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mem
Age
Commit message (
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Author
2008-02-10
Fix #include lines for renamed cache files.
Steve Reinhardt
2008-02-10
Rename cache files for brevity and consistency with rest of tree.
Steve Reinhardt
2008-02-06
Make the Event::description() a const function
Stephen Hines
2008-01-06
Temporary fix for ll/sc bug see flyspray task for more info:
Geoffrey Blake
2008-01-02
Add ReadRespWithInvalidate to handle multi-level coherence situation
Steve Reinhardt
2008-01-02
Mark cache-to-cache MSHRs as downstreamPending when necessary.
Steve Reinhardt
2008-01-02
Don't DPRINTF in the middle of a PrintReq.
Steve Reinhardt
2008-01-02
Bug fix: functional cache port now needs otherPort set.
Steve Reinhardt
2008-01-02
Additional comments and helper functions for PrintReq.
Steve Reinhardt
2008-01-02
Add functional PrintReq command for memory-system debugging.
Steve Reinhardt
2008-01-02
Fix formatting and comments in cache_impl.hh
Steve Reinhardt
2007-11-28
Make ports that aren't connected to anything fail more gracefully.
Gabe Black
2007-11-19
Memory: Cache the physical memory start and size so we don't need a dynamic c...
Ali Saidi
2007-11-16
Tweak check for writable block fill.
Steve Reinhardt
2007-11-16
Fix bug on exclusive response to ReadReq with pending WriteReq.
Steve Reinhardt
2007-11-15
branch merge
Korey Sewell
2007-11-14
Checkpointing: Name SE page table entries better so that there isn't a proble...
Ali Saidi
2007-11-14
remove unnecessary debug messages I added
Korey Sewell
2007-11-13
Add in files from merge-bare-iron, get them compiling in FS and SE mode
Korey Sewell
2007-11-04
Cache: Fix for OS X 10.5 compiling.
Ali Saidi
2007-11-01
DRAM: Make latency parameters be Param.Latency instead of ints.
Ali Saidi
2007-10-31
Merge in bus DPRINTF changes.
Steve Reinhardt
2007-10-31
Traceflags: Add SCons function to created a traceflag instead of having one f...
Ali Saidi
2007-10-25
TLB: Fix serialization issues with the tlb entries and make the page table st...
Gabe Black
2007-10-25
SE: Fix page table and system serialization, don't reinit process if this is ...
Ali Saidi
2007-09-16
mem: clean up bus/cache DPRINTFs a bit
Steve Reinhardt
2007-09-05
Bus: Fix drain code; old method could return 1 in atomic mode and never call ...
Ali Saidi
2007-08-30
params: Deprecate old-style constructors; update most SimObject constructors.
Miles Kaufmann
2007-08-26
Merge with head
Gabe Black
2007-08-26
Address translation: Make the page table more flexible.
Gabe Black
2007-08-12
MemorySystem: Fix the use of ?: to produce correct results.
Ali Saidi
2007-08-10
DMA: Add IOCache and fix bus bridge to optionally only send requests one
Ali Saidi
2007-08-10
Bus: Only call end() on an stl object once in a loop
Ali Saidi
2007-08-08
Port, StaticInst: Revert unnecessary changes.
Vincentius Robby
2007-08-08
alpha: Make the TLB cache to actually work.
Vincentius Robby
2007-08-04
port: Implement cache for port interfaces and ranges
Vincentius Robby
2007-08-03
cache: get rid of obsolete params from python.
Steve Reinhardt
2007-07-29
memory system: fix functional access bug.
Steve Reinhardt
2007-07-29
bus: take out response prioritization (timing was messed up).
Steve Reinhardt
2007-07-27
packet: get rid of unused intersect() function.
Steve Reinhardt
2007-07-27
cache/memtest: fixes for functional accesses.
Steve Reinhardt
2007-07-27
cache: Get rid of unused variable.
Steve Reinhardt
2007-07-26
Merge python and x86 changes with cache branch
Nathan Binkert
2007-07-26
Have owner respond to UpgradeReq to avoid race.
Steve Reinhardt
2007-07-26
Add downward express snoops for invalidations.
Steve Reinhardt
2007-07-26
Continue snooping after a writeback is encountered.
Steve Reinhardt
2007-07-26
bus: Fix default port handling.
Steve Reinhardt
2007-07-25
Can't block on memInhibit packets
Steve Reinhardt
2007-07-24
Integrate snoop loop functions into their respective call sites.
Steve Reinhardt
2007-07-24
Don't delete request at target... requester still needs it.
Steve Reinhardt
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