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path: root/src/mem
AgeCommit message (Expand)Author
2018-10-18mem: Delay servicing an MSHR after its allocationNikos Nikoleris
2018-10-18mem: Restructure whole-line writes to simplify write mergingNikos Nikoleris
2018-10-18mem: Determine if an MSHR does a whole-line writeNikos Nikoleris
2018-10-18mem: Mark the guest endianness packet accessors as deprecated.Gabe Black
2018-10-18null: Stop specifying an endianness in isa_traits.hh.Gabe Black
2018-10-18mem: Explicitly specify the endianness in the abstract memory.Gabe Black
2018-10-13mem-cache: Add missing includes in TreePLRUDaniel
2018-10-13mem: Get rid of some stray lines which ended up in packet.hh.Gabe Black
2018-10-12mem: Expose the raw packet accessor functions.Gabe Black
2018-10-11mem-cache: Factor ReplaceableEntry outDaniel R. Carvalho
2018-10-11mem-cache: Move sector_blks to tags folderDaniel R. Carvalho
2018-10-11mem-cache: Rename blk.cc/hh to cache_blk.cc/hhDaniel R. Carvalho
2018-10-11mem-cache: Virtualize block printDaniel R. Carvalho
2018-10-10mem-cache: Create Tree-PLRU replacement policyDaniel R. Carvalho
2018-10-10mem-cache: Remove CacheSet.hhDaniel R. Carvalho
2018-10-10mem-cache: Split Tags for indexing policiesDaniel R. Carvalho
2018-10-10mem-cache: Use set and way for ReplaceableEntryDaniel R. Carvalho
2018-10-10mem-cache: Use possible locations to find blockDaniel R. Carvalho
2018-10-10mem-cache: Create tags initialization functionDaniel R. Carvalho
2018-10-10mem-cache: Remove Packet dependency in TagsDaniel R. Carvalho
2018-10-05mem-cache: Fix FALRU hash invalidationDaniel R. Carvalho
2018-10-05mem-cache: Make checking function const in FALRUDaniel R. Carvalho
2018-10-05mem-cache: Make boundaries in FALRU an STL containerDaniel R. Carvalho
2018-10-05mem-cache: Fix FALRU inCachesMask initializationDaniel R. Carvalho
2018-09-24mem-ruby: Fix a bug in MessageBuffer randomizationXianwei Zhang
2018-09-19mem-cache: Fix non-bijective function in Skewed cachesDaniel R. Carvalho
2018-09-17mem: Implement QoS Proportional Fair policyGiacomo Travaglini
2018-09-13mem-cache: Fix bug in handleAtomicReqMissNikos Nikoleris
2018-09-07mem: Make DRAMCtrl a QoS-aware Memory ControllerMatteo Andreozzi
2018-09-07mem: Implement base QoS Policies.Giacomo Travaglini
2018-09-07mem: Add a simple QoS-aware Memory ControllerMatteo Andreozzi
2018-09-07mem: Add a QoS-aware Memory Controller typeMatteo Andreozzi
2018-09-07mem-cache: Create Skewed Assoc placement policyDaniel R. Carvalho
2018-08-22mem: Add StreamID and SubstreamIDStanislaw Czerniawski
2018-08-17scons,ruby: do not generate unnecessary filesBrandon Potter
2018-08-17ruby: remove unused code inside '#if 0 ... #endif'Brandon Potter
2018-07-25mem-cache: TempCacheBlk allocates and destroys its own dataRobert Kovacsics
2018-07-23mem: Rename Packet::checkFunctional to trySatisfyFunctionalRobert Kovacsics
2018-07-20mem: Removed "using namespace std;" from src/mem/packet.ccRobert Kovacsics
2018-07-19mem: Fix off-by-one error in checkFunctional, and simplify itRobert Kovacsics
2018-07-19mem-cache: Typo in comment: 'proceed' -> 'precede'Robert Kovacsics
2018-06-28mem: Add a memory delay simulatorAndreas Sandberg
2018-06-22mem-cache: Promote deferred targets on cache clean responsesNikos Nikoleris
2018-06-22mem-cache: Promote targets that don't require writableNikos Nikoleris
2018-06-22mem-cache: Fix promoting of targets that need writableNikos Nikoleris
2018-06-22mem-cache: Selectively clear downstream pendingNikos Nikoleris
2018-06-20mem-cache: Fix TempCacheBlock insertJason Lowe-Power
2018-06-19mem: Use address range to find the right physical addressNikos Nikoleris
2018-06-19mem: Use address range to find the destination port in the xbarNikos Nikoleris
2018-06-19mem: Use the caching in the AddrRangeMap class in PhysicalMemoryGabe Black
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