index
:
gem5
hitsb
invisispec-1.0
invisispec-with-dift
is-ift
is-ift-cachehit
is-rebase
is-rebase-new
is-rebase-new2
is-rebase-new3-rdtscp
is-rebase04-linux3.2
is-rebase05
is-rebase06-RequestPtr
is-rebase07-GCC8
is-rebase08-QoSmem
is-rebase09-linuxarm-3.7.0
is-rebase10-DynInstPtr
is-rebase11-LSQUnit
is-rebase12
simple-object-demo
gem5
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
src
/
mem
Age
Commit message (
Expand
)
Author
2006-11-10
Merge ktlim@zizzer:/bk/newmem
Kevin Lim
2006-11-09
Get SPARC to the point that it starts running. Add ability to load the ROM bi...
Ali Saidi
2006-11-09
Merge ktlim@zizzer:/bk/newmem
Kevin Lim
2006-11-09
Be sure to populate the packet's finishTime field in the atomic timing case.
Kevin Lim
2006-11-09
Draining fixes.
Kevin Lim
2006-11-08
Merge zizzer.eecs.umich.edu:/bk/newmem/
Gabe Black
2006-11-08
Put the ProcessInfo and StackTrace objects into the ISA namespaces.
Gabe Black
2006-11-07
Fix up bus draining and add draining to the caches.
Kevin Lim
2006-11-02
Merge ktlim@zizzer:/bk/newmem
Kevin Lim
2006-11-02
Have bus use the BadAddress device to handle bad addresses. The O3 CPU shoul...
Kevin Lim
2006-11-02
Caches return a new functional port whenever asked for one.
Kevin Lim
2006-11-01
Merge zizzer.eecs.umich.edu:/bk/newmem/
Gabe Black
2006-11-01
Added code to handle draining.
Gabe Black
2006-10-31
Merge ktlim@zizzer:/bk/newmem
Kevin Lim
2006-10-31
Ports now have a pointer to the MemObject that owns it (can be NULL).
Kevin Lim
2006-10-31
add the ability to insert into the middle of the timing port send list
Ali Saidi
2006-10-26
Merge zizzer:/bk/newmem
Ali Saidi
2006-10-25
Fix simple timing port keep a list of all packets, have only one event, and s...
Ali Saidi
2006-10-25
Fix fixPacket functionality to calculate sizes properly
Ron Dreslinski
2006-10-22
Clean up cache DPRINTFs
Steve Reinhardt
2006-10-22
s/pktuest/request/ (all in comments)
Steve Reinhardt
2006-10-21
Small bug fixes for timing LL/SC. Better now but
Steve Reinhardt
2006-10-21
Just give up if a store conditional misses completely
Steve Reinhardt
2006-10-21
Fix formatting that got screwed up when tabs were removed.
Steve Reinhardt
2006-10-21
Refactor coherence state table initialization.
Steve Reinhardt
2006-10-20
Get rid of a variable put back by merge.
Ron Dreslinski
2006-10-20
Merge zizzer:/bk/newmem
Ron Dreslinski
2006-10-20
Use fixPacket function everywhere.
Ron Dreslinski
2006-10-20
Use PacketPtr everywhere
Nathan Binkert
2006-10-19
refactor code for the packet, get rid of packet_impl.hh
Nathan Binkert
2006-10-19
initialize end, clean up loop
Nathan Binkert
2006-10-19
Fix compile of m5.fast
Nathan Binkert
2006-10-19
Fix corner case on assertion.
Ron Dreslinski
2006-10-19
Fix memtester to use functional access, fix cache to work functionally now th...
Ron Dreslinski
2006-10-19
Small changes:
Ron Dreslinski
2006-10-19
Fixes to get single level uni-coherence to work.
Ron Dreslinski
2006-10-19
Merge zizzer:/bk/newmem
Ron Dreslinski
2006-10-19
Always get the functional access from the highest level of cache first.
Ron Dreslinski
2006-10-19
First cut at LL/SC support in caches (atomic mode only).
Steve Reinhardt
2006-10-18
need some initializations before doing the loop.
Lisa Hsu
2006-10-18
Fix WriteInvalidateResp
Ron Dreslinski
2006-10-18
Merge zizzer:/bk/newmem
Ron Dreslinski
2006-10-18
Break a lot of overly long lines.
Steve Reinhardt
2006-10-18
Get rid of doData() lines (were already commented out).
Steve Reinhardt
2006-10-18
Get rid of obsolete in-cache copy support.
Steve Reinhardt
2006-10-17
Include packet_impl.hh (need this on my laptop,
Steve Reinhardt
2006-10-17
add code to serialize se structures. Lisa is working on the python side of th...
Ali Saidi
2006-10-17
Fixes for uni-coherence in timing mode for FS.
Ron Dreslinski
2006-10-17
Fixes to cache eliminating the assumption that the Packet is still valid afte...
Ron Dreslinski
2006-10-17
Properly chack the pkt pointer on upgrades to insure no segfaults when writeb...
Ron Dreslinski
[next]