| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2009-11-04 | build: fix compile problems pointed out by gcc 4.4 | Nathan Binkert | |
| 2009-10-28 | license: Fix license on network model code | Nathan Binkert | |
| This mostly was a matter of changing the license owner to Princeton which is as it should have been. The code was originally licensed under the GPL but was relicensed as BSD by Li-Shiuan Peh on July 27, 2009. This relicensing was in an explicit e-mail to Nathan Binkert, Brad Beckmann, Mark Hill, David Wood, and Steve Reinhardt. | |||
| 2009-10-26 | fixed error message generation bug in SLICC ast files | Brad Beckmann | |
| 2009-10-03 | bus: add assertion to catch illegal retry | Steve Reinhardt | |
| on mem-inhibited transaction. | |||
| 2009-09-26 | Minor cleanup: Use the blockAlign() method where it applies in the cache. | Steve Reinhardt | |
| 2009-09-26 | Force prefetches to check cache and MSHRs immediately prior to issue. | Steve Reinhardt | |
| This prevents redundant prefetches from being issued, solving the occasional 'needsExclusive && !blk->isWritable()' assertion failure in cache_impl.hh that several people have run into. Eliminates "prefetch_cache_check_push" flag, neither setting of which really solved the problem. | |||
| 2009-09-23 | ruby: Disable all debug output by default | Nathan Binkert | |
| 2009-09-23 | arch: nuke arch/isa_specific.hh and move stuff to generated config/the_isa.hh | Nathan Binkert | |
| 2009-09-22 | slicc: Pure python implementation of slicc. | Nathan Binkert | |
| This is simply a translation of the C++ slicc into python with very minimal reorganization of the code. The output can be verified as nearly identical by doing a "diff -wBur". Slicc can easily be run manually by using util/slicc | |||
| 2009-09-22 | scons: add slicc and ply to sys.path and PYTHONPATH so everyone has access | Nathan Binkert | |
| 2009-09-22 | python: Move more code into m5.util allow SCons to use that code. | Nathan Binkert | |
| Get rid of misc.py and just stick misc things in __init__.py Move utility functions out of SCons files and into m5.util Move utility type stuff from m5/__init__.py to m5/util/__init__.py Remove buildEnv from m5 and allow access only from m5.defines Rename AddToPath to addToPath while we're moving it to m5.util Rename read_command to readCommand while we're moving it Rename compare_versions to compareVersions while we're moving it. --HG-- rename : src/python/m5/convert.py => src/python/m5/util/convert.py rename : src/python/m5/smartdict.py => src/python/m5/util/smartdict.py | |||
| 2009-09-11 | Added new MESI files | Polina Dudnik | |
| 2009-09-11 | Config adjustments for MESI | Polina Dudnik | |
| 2009-09-11 | Somayeh's MESI protocol with Polina's bug fixes | Polina Dudnik | |
| 2009-09-11 | MI data corruption bug fix | Polina Dudnik | |
| 2009-09-11 | Object print bug fix | Polina Dudnik | |
| 2009-09-11 | MOESI data corruption bug fix | Polina Dudnik | |
| 2009-08-31 | [mq]: MOESI_patch | Polina Dudnik | |
| 2009-08-28 | Reset the atomics flags if RMW_Read is not followed by a RMW_Read or RMW_Write | Polina Dudnik | |
| 2009-08-28 | imported patch mi_patch | Polina Dudnik | |
| 2009-08-15 | Made servicing_atomic a counter and added started writes: | Polina Dudnik | |
| a function for setting the flag to indicate that the rmw_writes started issuing | |||
| 2009-08-14 | Bug fix: indicate when writes started coming in | Polina Dudnik | |
| 2009-08-14 | Merge with current branch | Polina Dudnik | |
| 2009-08-14 | Added proc_id to CacheMsg for SMT. | Polina Dudnik | |
| Not yet necessary, but in case each of the threads is allowed to initiate an atomic, will come in handy | |||
| 2009-08-14 | Multi-line RMW handling | Polina Dudnik | |
| 2009-08-14 | SMT atomics modifications: | Polina Dudnik | |
| don't allow enquing from other threads if servicing and atomic for a thread | |||
| 2009-08-13 | Automated merge with ssh://hg@m5sim.org/m5 | Derek Hower | |
| 2009-08-13 | ruby: config bugfix | Derek Hower | |
| 2009-08-11 | ruby/network data_msg_size bug fix with updated stats | Tushar Krishna | |
| 2009-08-11 | merged Tushar's bug fix with public repository changes | Brad Beckmann | |
| 2009-08-09 | protocol: added recycle actions to MOESI DMA events | Derek Hower | |
| 2009-08-07 | bug fix for data_msg_size in network/Network.cc | Tushar Krishna | |
| 2009-08-06 | fixed MOESI_CMP_directory bug | Derek Hower | |
| 2009-08-06 | protocol: fixed MOESI_CMP_directory bug | Derek Hower | |
| 2009-08-06 | ruby: better configuration assert message | Derek Hower | |
| 2009-08-05 | merge | Derek Hower | |
| 2009-08-05 | ruby: configuration supports multiple runs in same session | Derek Hower | |
| These changes allow to run Ruby-gems multiple times from the same ruby-lang script with different configurations | |||
| 2009-08-05 | protocol: made MI_example dma mapping generic | Derek Hower | |
| 2009-08-04 | ruby: made mapAddressToRange based off a bit count | Derek Hower | |
| 2009-08-04 | slicc: added MOESI_CMP_directory, DMA SequencerMsg, parameterized controllers | Derek Hower | |
| This changeset contains a lot of different changes that are too mingled to separate. They are: 1. Added MOESI_CMP_directory I made the changes necessary to bring back MOESI_CMP_directory, including adding a DMA controller. I got rid of MOESI_CMP_directory_m and made MOESI_CMP_directory use a memory controller. Added a new configuration for two level protocols in general, and MOESI_CMP_directory in particular. 2. DMA Sequencer uses a generic SequencerMsg I will eventually make the cache Sequencer use this type as well. It doesn't contain an offset field, just a physical address and a length. MI_example has been updated to deal with this. 3. Parameterized Controllers SLICC controllers can now take custom parameters to use for mapping, latencies, etc. Currently, only int parameters are supported. | |||
| 2009-08-04 | slicc: generate html by default | Derek Hower | |
| 2009-08-04 | slicc: better error messages when the python parser fails | Nathan Binkert | |
| 2009-08-03 | Automated merge with ssh://hg@m5sim.org/m5 | Derek Hower | |
| 2009-08-01 | Fix setting of INST_FETCH flag for O3 CPU. | Steve Reinhardt | |
| It's still broken in inorder. Also enhance DPRINTFs in cache and physical memory so we can see more easily whether it's getting set or not. | |||
| 2009-08-01 | Clean up some inconsistencies with Request flags. | Steve Reinhardt | |
| 2009-08-01 | Rename internal Request fields to start with '_'. | Steve Reinhardt | |
| The inconsistency was causing a subtle bug with some of the constructors where the params had the same name as the fields. This is also a first step to switching the accessors over to our new "standard", e.g., getVaddr() -> vaddr(). | |||
| 2009-07-29 | ruby: fixed clearStats | Derek Hower | |
| 2009-07-27 | ruby: removed unused/incorrect profiler state | Derek Hower | |
| 2009-07-22 | Fixed the licences plus minor fixes for compilation | Polina Dudnik | |
| 2009-07-21 | ruby: fixed sequencer RMW data bug | Derek Hower | |
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