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I think readData() and writeData() were used for Erik's compression
work, but that code is gone, these aren't called anymore, and they
don't even really do what their names imply.
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I did some of the flags and assertions wrong. Thanks to Brad Beckmann
for pointing this out. I should have run the opt regressions instead
of the fast. I also screwed up some of the logical functions in the Flags
class.
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Move the constructor into the .cc file and get rid of the typedef for
SendEvent.
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Would have saved me much debugging time if these
had been in there previously.
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Makes adding write-through operations easier.
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connotations for what is really happening and how it should be used.
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redundancies with threadId() as their replacement.
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the primary identifier for a hardware context should be contextId(). The
concept of threads within a CPU remains, in the form of threadId() because
sometimes you need to know which context within a cpu to manipulate.
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comments.
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HG: user: Lisa Hsu <hsul@eecs.umich.edu> HG: branch default HG: changed
src/mem/cache/cache.hh
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memory range.
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For now, there is still a single global event queue, but this is
necessary for making the steps towards a parallelized m5.
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Since the early days of M5, an event needed to know which event queue
it was on, and that data was required at the time of construction of
the event object. In the future parallelized M5, this sort of
requirement does not work well since the proper event queue will not
always be known at the time of construction of an event. Now, events
are created, and the EventQueue itself has the schedule function,
e.g. eventq->schedule(event, when). To simplify the syntax, I created
a class called EventManager which holds a pointer to an EventQueue and
provides the schedule interface that is a proxy for the EventQueue.
The intent is that objects that frequently schedule events can be
derived from EventManager and then they have the schedule interface.
SimObject and Port are examples of objects that will become
EventManagers. The end result is that any SimObject can just call
schedule(event, when) and it will just call that SimObject's
eventq->schedule function. Of course, some objects may have more than
one EventQueue, so this interface might not be perfect for those, but
they should be relatively few.
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should configure their editors to not insert tabs
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Also update stats to reflect change.
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each time.
This appears to work, but I don't want to commit it until it gets tested a lot more.
I haven't deleted the functionality in this patch that will come later, but one question
is how to enforce encourage objects that call getVirtPort() to not cache the virtual port
since if the CPU changes out from under them it will be worse than useless. Perhaps a null
function like delVirtPort() is still useful in that case.
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Force all non-default ports to provide a name and an
owner in the constructor.
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It runs out that if a MemObject turns around and does a send in its
receive callback, and there are other sends already scheduled, then
it could observe a state where it's not at the head of the list but
the bus's sendEvent is not scheduled (because we're still in the
middle of processing the prior sendEvent).
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I was asserting that the only reason you would defer targets is if
a write came in while you had an outstanding read miss, but there's
another case where you could get a read access after you've snooped
an invalidation and buffered it because it applies to a prior
outstanding miss.
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Make OutputDirectory::resolve() private and change the functions using
resolve() to instead use create().
--HG--
extra : convert_revision : 36d4be629764d0c4c708cec8aa712cd15f966453
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--HG--
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--HG--
extra : convert_revision : b931472e81dedb650b7accb9061cb426f1c32e66
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the problem
--HG--
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--HG--
extra : convert_revision : 4fa64f8a929f1aa36a9d5a71b8d1816b497aca4c
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when the Packet is deleted, since the requester
can't possibly do it.
--HG--
extra : convert_revision : 8571b144ecb3c70efc06d09faa8b3161fb58352d
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--HG--
extra : convert_revision : 02775cfb460afe6df0df0938c62cccd93a71e775
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getting wrong writeback address.
--HG--
extra : convert_revision : 023dfb69c227c13a69bfe2744c6af75a45828b0b
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--HG--
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--HG--
extra : convert_revision : db8497e73a44f2a06aab121e797e88b4c0c31330
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if a prior write miss arrived while an even earlier
read miss was still outstanding.
--HG--
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--HG--
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--HG--
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