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path: root/src/mem
AgeCommit message (Expand)Author
2018-11-18mem-cache: a missing cast was truncating addressesJavier Bueno
2018-11-16mem: avoid calling regStat twice on a QoSPolicyMatteo Andreozzi
2018-11-15mem-cache: fix invalid iterator accessJavier Bueno
2018-11-15mem-cache: Make StridePrefetcher use Replacement PoliciesDaniel
2018-11-15mem-cache: Add invalidation function to StrideEntryDaniel
2018-11-15mem-cache: Make PCTable context independentDaniel
2018-11-15mem-cache: Vectorize StridePrefetcher's entries.Daniel
2018-11-15mem-cache: Return entry in StridePrefetcher::pcTableHit()Daniel
2018-11-15mem-cache: Cleanup prefetchersDaniel
2018-11-14mem-cache: Remove Cache dependency from TagsDaniel R. Carvalho
2018-11-14mem-cache: Move access latency calculation to CacheDaniel R. Carvalho
2018-11-14mem-cache: implement a probe-based interfaceJavier Bueno
2018-11-13mem-cache: Align how we handle requests in atomic with timingNikos Nikoleris
2018-11-07mem-ruby: Use Packet writing functions instead of memcpyDaniel R. Carvalho
2018-11-05mem-cache: Rename the tag class init function to tagsInit.Gabe Black
2018-11-05mem: Use Packet writing functions instead of memcpyDaniel R. Carvalho
2018-11-05mem-cache: Fix double block invalidationDaniel R. Carvalho
2018-10-26mem-ruby: Fix MOESI_CMP_directory in ports orderNikos Nikoleris
2018-10-26arch-arm: We add PRFM PST instruction for armyuetsu.kodama
2018-10-22mem-cache: Move evictBlock(CacheBlk*, PacketList&) to baseDaniel R. Carvalho
2018-10-18mem-cache: Fix unused variable warning in FALRU:invalidate()Nikos Nikoleris
2018-10-18mem: Add write coalescing and write-no-allocate to the cachesNikos Nikoleris
2018-10-18mem: Delay servicing an MSHR after its allocationNikos Nikoleris
2018-10-18mem: Restructure whole-line writes to simplify write mergingNikos Nikoleris
2018-10-18mem: Determine if an MSHR does a whole-line writeNikos Nikoleris
2018-10-18mem: Mark the guest endianness packet accessors as deprecated.Gabe Black
2018-10-18null: Stop specifying an endianness in isa_traits.hh.Gabe Black
2018-10-18mem: Explicitly specify the endianness in the abstract memory.Gabe Black
2018-10-13mem-cache: Add missing includes in TreePLRUDaniel
2018-10-13mem: Get rid of some stray lines which ended up in packet.hh.Gabe Black
2018-10-12mem: Expose the raw packet accessor functions.Gabe Black
2018-10-11mem-cache: Factor ReplaceableEntry outDaniel R. Carvalho
2018-10-11mem-cache: Move sector_blks to tags folderDaniel R. Carvalho
2018-10-11mem-cache: Rename blk.cc/hh to cache_blk.cc/hhDaniel R. Carvalho
2018-10-11mem-cache: Virtualize block printDaniel R. Carvalho
2018-10-10mem-cache: Create Tree-PLRU replacement policyDaniel R. Carvalho
2018-10-10mem-cache: Remove CacheSet.hhDaniel R. Carvalho
2018-10-10mem-cache: Split Tags for indexing policiesDaniel R. Carvalho
2018-10-10mem-cache: Use set and way for ReplaceableEntryDaniel R. Carvalho
2018-10-10mem-cache: Use possible locations to find blockDaniel R. Carvalho
2018-10-10mem-cache: Create tags initialization functionDaniel R. Carvalho
2018-10-10mem-cache: Remove Packet dependency in TagsDaniel R. Carvalho
2018-10-05mem-cache: Fix FALRU hash invalidationDaniel R. Carvalho
2018-10-05mem-cache: Make checking function const in FALRUDaniel R. Carvalho
2018-10-05mem-cache: Make boundaries in FALRU an STL containerDaniel R. Carvalho
2018-10-05mem-cache: Fix FALRU inCachesMask initializationDaniel R. Carvalho
2018-09-24mem-ruby: Fix a bug in MessageBuffer randomizationXianwei Zhang
2018-09-19mem-cache: Fix non-bijective function in Skewed cachesDaniel R. Carvalho
2018-09-17mem: Implement QoS Proportional Fair policyGiacomo Travaglini
2018-09-13mem-cache: Fix bug in handleAtomicReqMissNikos Nikoleris
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