index
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gem5
hitsb
invisispec-1.0
invisispec-with-dift
is-ift
is-ift-cachehit
is-rebase
is-rebase-new
is-rebase-new2
is-rebase-new3-rdtscp
is-rebase04-linux3.2
is-rebase05
is-rebase06-RequestPtr
is-rebase07-GCC8
is-rebase08-QoSmem
is-rebase09-linuxarm-3.7.0
is-rebase10-DynInstPtr
is-rebase11-LSQUnit
is-rebase12
simple-object-demo
gem5
summary
refs
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path:
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src
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python
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m5
/
config.py
Age
Commit message (
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Author
2008-06-14
Add .m5 configuration directory
Nathan Binkert
2006-09-04
Split config.py into multiple files.
Steve Reinhardt
2006-09-04
config.py:
Steve Reinhardt
2006-08-31
Tweak proxy resolution error message.
Steve Reinhardt
2006-07-14
Merge ktlim@zizzer:/bk/newmem
Kevin Lim
2006-07-14
Minor updates.
Kevin Lim
2006-07-12
memory mode information now contained in system object
Ali Saidi
2006-07-06
Change the return value of drain. False means the object wasn't able to drai...
Kevin Lim
2006-07-05
Rename quiesce to drain to avoid confusion with the pseudo instruction.
Kevin Lim
2006-07-02
Fix default SMT configuration in O3CPU (i.e. fetch policy, workloads/numThreads)
Korey Sewell
2006-06-29
Add in support for quiescing the system, taking checkpoints, restoring from c...
Kevin Lim
2006-06-17
Rename SWIG "main" module to "cc_main" so it's
Steve Reinhardt
2006-06-15
Get Port stuff working with full-system scripts.
Steve Reinhardt
2006-06-13
Move SimObject creation and Port connection loops
Steve Reinhardt
2006-06-11
Add some utility functions to ease handling
Steve Reinhardt
2006-06-10
Don't allow SimObject-valued class params to be set
Steve Reinhardt
2006-06-10
Only allow SimObject classes to be instantiated (no cloning!).
Steve Reinhardt
2006-06-09
Move main control from C++ into Python.
Steve Reinhardt
2006-05-31
Updated Authors from bk prs info
Ali Saidi
2006-05-30
Link in Python interpreter.
Steve Reinhardt
2006-05-22
New directory structure:
Steve Reinhardt