| Age | Commit message (Expand) | Author |
|---|
| 2007-05-10 | add/update parameters for bus bridge | Ali Saidi |
| 2007-05-07 | fix partial writes with a functional memory hack | Ali Saidi |
| 2007-03-29 | Override addPrivateSplitL1Caches function in order to automatically set the t... | Kevin Lim |
| 2007-03-26 | first bit of life from the intel gigabit model | Ali Saidi |
| 2007-03-06 | Move all of the parameters of the Root SimObject so they are | Nathan Binkert |
| 2007-03-03 | Add Iob and remove the fake device | Ali Saidi |
| 2007-03-03 | Implement Niagara I/O interface and rework interrupts | Ali Saidi |
| 2007-02-21 | Get rid of the ConsoleListener SimObject and just fold the | Nathan Binkert |
| 2007-02-18 | Get rid of the Serialize and IntervalStats Param contexts | Nathan Binkert |
| 2007-02-17 | Get rid of the Statistics and Statreset ParamContexts, and | Nathan Binkert |
| 2007-02-13 | Make mulitple consoles work and be distinguishable from each other | Ali Saidi |
| 2007-02-13 | Merge all of the execution trace configuration stuff into | Nathan Binkert |
| 2007-02-09 | Get rid of the Trace ParamContext and give python direct | Nathan Binkert |
| 2007-01-31 | make sparc fs less chatty | Ali Saidi |
| 2007-01-25 | Move time forward to Jan 1, 2009 and update stats | Nathan Binkert |
| 2007-01-25 | Instead of passing an int to represent time between python and C++ | Nathan Binkert |
| 2007-01-21 | add dumb time of day device | Ali Saidi |
| 2007-01-09 | add memory mapped disk device | Ali Saidi |
| 2007-01-03 | Add 'Time' as a parameter type that can accept various | Nathan Binkert |
| 2006-12-29 | Merge zizzer.eecs.umich.edu:/bk/newmem | Nathan Binkert |
| 2006-12-29 | Formatting | Nathan Binkert |
| 2006-12-27 | Bug fixes in the TLB | Ali Saidi |
| 2006-12-15 | small change to eliminate address range overlap. | Lisa Hsu |
| 2006-12-12 | Merge zizzer:/bk/newmem | Lisa Hsu |
| 2006-12-07 | get legion/m5 to first tlb miss fault | Ali Saidi |
| 2006-12-04 | More changes to get SPARC fs closer. Now at 1.2M cycles before difference | Ali Saidi |
| 2006-12-02 | Fix help strings on GenRepl params. | Steve Reinhardt |
| 2006-11-30 | Load the hypervisor symbols twice, once with an address mask so that we can g... | Ali Saidi |
| 2006-11-22 | Added a parameter to set memory to zero. This is to support Legion, and once ... | Gabe Black |
| 2006-11-22 | Merge zizzer:/bk/sparcfs | Gabe Black |
| 2006-11-20 | Add in rom/rams for the nvram, hypervisor description, and partition descript... | Gabe Black |
| 2006-11-16 | Implement current working directory for LiveProcesses | Nathan Binkert |
| 2006-11-16 | Merge zower.eecs.umich.edu:/home/gblack/m5/newmemmemops | Gabe Black |
| 2006-11-16 | Merge zizzer.eecs.umich.edu:/bk/newmem/ | Gabe Black |
| 2006-11-16 | Fixes for SPARC_FS | Gabe Black |
| 2006-11-14 | Merge zizzer.eecs.umich.edu:/bk/newmem/ | Gabe Black |
| 2006-11-14 | Merge 141.212.106.238:/home/gblack/m5/newmemmemops | Gabe Black |
| 2006-11-14 | Create a stub t1000 platform. | Gabe Black |
| 2006-11-14 | Update phase param in the .py file for the cpus | Ron Dreslinski |
| 2006-11-13 | Expose debugBreakCycle through swig and get rid of | Nathan Binkert |
| 2006-11-11 | Fix Typo | Nathan Binkert |
| 2006-11-11 | Get rid of the ParamContext for pseudo instructions and move | Nathan Binkert |
| 2006-11-09 | Get SPARC to the point that it starts running. Add ability to load the ROM bi... | Ali Saidi |
| 2006-11-08 | Remove mem parameter. Should have been removed earlier. | Kevin Lim |
| 2006-11-07 | Remove hack by setting configuration better. | Kevin Lim |
| 2006-11-06 | delete pcifake, tsunamifake. Combine BadAddr/IsaFake into one | Ali Saidi |
| 2006-11-02 | Have bus use the BadAddress device to handle bad addresses. The O3 CPU shoul... | Kevin Lim |
| 2006-10-24 | Merge zizzer:/bk/newmem | Ali Saidi |
| 2006-10-20 | Use fixPacket function everywhere. | Ron Dreslinski |
| 2006-10-20 | still working on getting past initialization | Ali Saidi |
