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path: root/src/python/m5/objects
AgeCommit message (Expand)Author
2006-11-16Implement current working directory for LiveProcessesNathan Binkert
2006-11-14Update phase param in the .py file for the cpusRon Dreslinski
2006-11-13Expose debugBreakCycle through swig and get rid ofNathan Binkert
2006-11-11Fix TypoNathan Binkert
2006-11-11Get rid of the ParamContext for pseudo instructions and moveNathan Binkert
2006-11-09Get SPARC to the point that it starts running. Add ability to load the ROM bi...Ali Saidi
2006-11-08Remove mem parameter. Should have been removed earlier.Kevin Lim
2006-11-07Remove hack by setting configuration better.Kevin Lim
2006-11-06delete pcifake, tsunamifake. Combine BadAddr/IsaFake into oneAli Saidi
2006-11-02Have bus use the BadAddress device to handle bad addresses. The O3 CPU shoul...Kevin Lim
2006-10-24Merge zizzer:/bk/newmemAli Saidi
2006-10-20Use fixPacket function everywhere.Ron Dreslinski
2006-10-20still working on getting past initializationAli Saidi
2006-10-18Get rid of obsolete in-cache copy support.Steve Reinhardt
2006-10-17Enable MP systems via cmd-line flag in fs.py.Steve Reinhardt
2006-10-11More cache fixes. Atomic coherence now works as well.Ron Dreslinski
2006-10-09Merge ktlim@zizzer:/bk/newmemKevin Lim
2006-10-09Merge zizzer.eecs.umich.edu:/bk/newmemGabe Black
2006-10-09Make memtest work with 8 memtestersRon Dreslinski
2006-10-09Update the Memtester, commit a config file/test for it.Ron Dreslinski
2006-10-08Merge zizzer.eecs.umich.edu:/bk/newmemGabe Black
2006-10-08bus changesGabe Black
2006-10-08Implement Alpha LL/SC support for SimpleCPU (Atomic & Timing)Steve Reinhardt
2006-10-08Clean up configs.Kevin Lim
2006-10-05Partial reimplementation of the bus. The "clock" and "width" parameters have ...Gabe Black
2006-10-02Updates to fix merge issues and bring almost everything up to working speed. ...Kevin Lim
2006-09-30Merge ktlim@zamp:./local/clean/o3-merge/m5Kevin Lim
2006-09-18add boiler plate intel nic codeAli Saidi
2006-09-15Merge zizzer.eecs.umich.edu:/bk/newmemGabe Black
2006-09-05Enable proxies (Self/Parent) for specifying ports.Steve Reinhardt
2006-09-04More Python hacking to deal with config.py splitSteve Reinhardt
2006-09-03Added uid, euid, gid, egid, pid and ppid parameters to a live process.Gabe Black
2006-08-21Merge zizzer:/z/m5/Bitkeeper/newmemRon Dreslinski
2006-08-18Update reference outputsSteve Reinhardt
2006-08-17add default range to PhysicalMemoryAli Saidi
2006-08-16Fix the caches not working in the regressionRon Dreslinski
2006-08-16Merge zizzer:/bk/newmemAli Saidi
2006-08-16Fix Physical Memory to allow memory sizes bigger than 128MB.Ali Saidi
2006-08-16Minor regression fixes.Steve Reinhardt
2006-08-16Finish test clean-up & reorg.Steve Reinhardt
2006-08-16More restructuring of regression tests.Steve Reinhardt
2006-07-27Need config read/write latency.Kevin Lim
2006-07-21Merge ktlim@zizzer:/bk/newmemKevin Lim
2006-07-21Minor functionality updates.Kevin Lim
2006-07-19Merge zizzer:/bk/newmemAli Saidi
2006-07-19Change the device latency here to a latency rather than a TickAli Saidi
2006-07-19Minor changes to reflect state used for regression stats.Kevin Lim
2006-07-14Merge ktlim@zizzer:/bk/newmemKevin Lim
2006-07-13add system.mem_mode = ['timing', 'atomic']Ali Saidi
2006-07-12memory mode information now contained in system objectAli Saidi
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