index
:
gem5
hitsb
invisispec-1.0
invisispec-with-dift
is-ift
is-ift-cachehit
is-rebase
is-rebase-new
is-rebase-new2
is-rebase-new3-rdtscp
is-rebase04-linux3.2
is-rebase05
is-rebase06-RequestPtr
is-rebase07-GCC8
is-rebase08-QoSmem
is-rebase09-linuxarm-3.7.0
is-rebase10-DynInstPtr
is-rebase11-LSQUnit
is-rebase12
simple-object-demo
gem5
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
src
/
python
/
m5
Age
Commit message (
Expand
)
Author
2016-09-15
base: eliminate ipython warning
Curtis Dunham
2016-09-13
base: Output all AddrRange parameters to config.ini
Matt Poremba
2016-05-27
power: Allow voltage to be configured via cmd line
Akash Bagdia
2016-04-06
misc: Bail out of DVFS dot if we cannot resolve the domains
Sascha Bischoff
2015-12-15
misc: Add secondary dot output for DVFS domains
Sascha Bischoff
2016-03-30
style: Refactor the style checker as a Python package
Andreas Sandberg
2015-11-26
sim: Add support for forking
Andreas Sandberg
2015-11-26
sim: Add support for notifying Drainable objects of a fork
Andreas Sandberg
2016-02-13
configs: add command-line option to stop debug output
Michael LeBeane
2016-02-06
style: remove trailing whitespace
Steve Reinhardt
2016-01-17
sim: fix redundant --debug-start help string
Steve Reinhardt
2016-01-17
sim: don't ignore SIG_TRAP
Steve Reinhardt
2015-12-01
config: Fix broken SimObject listing
Andreas Sandberg
2015-11-22
config: Added missing types to JSON/INI Python reader
Andrew Bardsley
2015-10-06
sim: print pid in output header
Steve Reinhardt
2015-09-30
base: remove Trace::enabled flag
Curtis Dunham
2015-07-07
sim: Decouple draining from the SimObject hierarchy
Andreas Sandberg
2015-07-07
sim: Move mem(Writeback|Invalidate) to SimObject
Andreas Sandberg
2015-07-07
python: Remove redundant drain when changing memory modes
Andreas Sandberg
2015-07-07
sim: Refactor the serialization base class
Andreas Sandberg
2015-03-23
misc: quote args in echoed command line
Steve Reinhardt
2015-02-03
base: Add XOR-based hashed address interleaving
Andreas Hansson
2015-02-03
config: Fix typo in Float param
Geoffrey Blake
2014-12-02
scons: Ensure dictionary iteration is sorted by key
Andreas Hansson
2014-11-12
sim: Sort SimObject descendants and ports
Andreas Hansson
2014-10-16
config: Add the ability to read a config file using C++ and Python
Andreas Hansson
2014-10-16
config: Add a --without-python option to build process
Andrew Bardsley
2014-10-11
sim: draining bug for fast-forwaring multiple cores
Andrew Lukefahr
2014-10-09
config: Add Current as a parameter type
Andreas Hansson
2014-09-20
mem: Rename Bus to XBar to better reflect its behaviour
Andreas Hansson
2014-09-20
config: Cleanup .json config file generation
Andrew Bardsley
2014-09-09
config: Fix vectorparam command line parsing
Geoffrey Blake
2014-09-03
config: Add port splicing capability to PortRef class
Geoffrey Blake
2014-09-03
config: Change parsing of Addr so hex values work from scripts
Mitch Hayenga
2014-08-10
config: Add hooks to enable new config sys
Geoffrey Blake
2014-05-09
cpu: Add flag name printing to StaticInst
Andrew Bardsley
2014-05-09
config: Avoid generating a reference to myself for Parent.any
Geoffrey Blake
2014-05-09
scons: Require SWIG >= 2.0.4 and remove vector typemaps
Curtis Dunham
2014-04-23
misc: Proper type check and import for PortRef
Sascha Bischoff
2014-02-10
stats: better error message for uninitialized statistic
Curtis Dunham
2014-03-23
misc: Fix -q (quiet) flag
Stan Czerniawski
2014-01-24
base: add support for probe points and common probes
Matt Horsnell
2014-01-24
config: Make the Clock a Tick parameter like Latency/Frequency
Andreas Hansson
2014-01-03
python: provide better error message for wrapped C++ methods
Steve Reinhardt
2014-01-03
python: don't die on assignment to cloned object
Steve Reinhardt
2013-12-03
sim: reset stats after startup
Nilay Vaish
2013-11-25
sim: simulate with multiple threads and event queues
Steve Reinhardt ext:(%2C%20Nilay%20Vaish%20%3Cnilay%40cs.wisc.edu%3E%2C%20Ali%20Saidi%20%3CAli.Saidi%40ARM.com%3E)
2013-11-14
tests: suppress output on switcheroo tests
Steve Reinhardt
2013-11-01
sim: Clarify the difference between tracing and debugging
Andreas Hansson
2013-10-31
config: Fix handling of parents for simobject vectors
Geoffrey Blake
[next]