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Age
Commit message (
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Author
2016-02-06
style: fix missing spaces in control statements
Steve Reinhardt
2015-12-10
dev: Move network devices to src/dev/net/
Andreas Sandberg
2015-08-14
ruby: Expose MessageBuffers as SimObjects
Joel Hestness
2015-07-07
sim: Refactor the serialization base class
Andreas Sandberg
2014-11-06
ruby: interface with classic memory controller
Nilay Vaish
2014-10-16
config: Add a --without-python option to build process
Andrew Bardsley
2014-09-01
ruby: message buffers: significant changes
Nilay Vaish
2013-09-04
arch: Resurrect the NOISA build target and rename it NULL
Andreas Hansson
2013-02-19
scons: Add warning for missing declarations
Andreas Hansson
2012-10-15
Port: Add protocol-agnostic ports in the port hierarchy
Andreas Hansson
2012-03-30
MEM: Introduce the master/slave port sub-classes in C++
William Wang
2012-01-07
Merge with main repository.
Gabe Black
2011-11-07
SE/FS: Remove FULL_SYSTEM from swig.
Gabe Black
2011-10-31
GCC: Get everything working with gcc 4.6.1.
Gabe Black
2011-04-15
includes: sort all includes
Nathan Binkert
2007-10-31
String constant const-ness changes to placate g++ 4.2.
Steve Reinhardt
2007-09-04
Serialization: Fix unserialization of object pointers
Ali Saidi
2007-09-04
Config: Remove some ini file code that no longer works
Ali Saidi
2007-08-17
Ports: Only try to do EthPort stuff in full system.
Ali Saidi
2007-08-16
Devices: Make EtherInts connect in the same way memory ports currently do.
Ali Saidi
2007-07-23
Major changes to how SimObjects are created and initialized. Almost all
Nathan Binkert
2007-05-19
PhysicalMemory has vector of uniform ports instead of one special one.
Steve Reinhardt
2007-03-02
Factor code out of main.cc and main.i into a bunch of files
Nathan Binkert