gem5 - gem5

Age	Commit message (Expand)	Author
2016-09-13	misc: Remove FullSystem check for networking components	Michael LeBeane
2015-11-26	sim: Add support for forking	Andreas Sandberg
2015-11-27	base: Add support for changing output directories	Andreas Sandberg
2016-02-06	style: fix missing spaces in control statements	Steve Reinhardt
2016-02-06	style: remove trailing whitespace	Steve Reinhardt
2015-12-10	dev: Move network devices to src/dev/net/	Andreas Sandberg
2015-09-30	base: remove Trace::enabled flag	Curtis Dunham
2015-08-14	ruby: Expose MessageBuffers as SimObjects	Joel Hestness
2015-07-07	sim: Decouple draining from the SimObject hierarchy	Andreas Sandberg
2015-07-07	sim: Refactor the serialization base class	Andreas Sandberg
2014-12-23	sim: fix reference counting of PythonEvent	Curtis Dunham
2014-11-06	ruby: interface with classic memory controller	Nilay Vaish
2014-10-16	sim: EventQueue wakeup on events scheduled outside the event loop	Andreas Hansson
2014-10-16	base: Reimplement the DPRINTF mechanism in a Logger class	Andrew Bardsley
2014-10-16	config: Add a --without-python option to build process	Andrew Bardsley
2014-09-01	ruby: message buffers: significant changes	Nilay Vaish
2013-11-25	sim: simulate with multiple threads and event queues	Steve Reinhardt ext:(%2C%20Nilay%20Vaish%20%3Cnilay%40cs.wisc.edu%3E%2C%20Ali%20Saidi%20%3CAli.Saidi%40ARM.com%3E)
2013-09-04	arch: Resurrect the NOISA build target and rename it NULL	Andreas Hansson
2013-02-19	scons: Add warning for missing declarations	Andreas Hansson
2013-01-07	stats: Fix swig wrapping for Tick in stats	Sascha Bischoff
2012-11-16	sim: have a curTick per eventq	Nilay Vaish
2012-11-02	sim: Add SWIG interface for Serializable	Andreas Sandberg
2012-11-02	sim: Move the draining interface into a separate base class	Andreas Sandberg
2012-10-15	Port: Add protocol-agnostic ports in the port hierarchy	Andreas Hansson
2012-09-25	Statistics: Add a function to configure periodic stats dumping	Sascha Bischoff
2012-09-19	AddrRange: Transition from Range<T> to AddrRange	Andreas Hansson
2012-06-05	sim: Remove FastAlloc	Ali Saidi
2012-06-05	stats: Provide a mechanism to get a callback when stats are dumped.	Mitchell Hayenga
2012-05-10	stats: track if the stats have been enabled and prevent requesting master id	Ali Saidi
2012-03-30	MEM: Introduce the master/slave port sub-classes in C++	William Wang
2012-01-07	Merge with main repository.	Gabe Black
2011-11-07	SE/FS: Remove FULL_SYSTEM from swig.	Gabe Black
2011-10-31	GCC: Get everything working with gcc 4.6.1.	Gabe Black
2011-10-20	SimObject: add export_method* hooks to export C++ methods to Python	Steve Reinhardt
2011-08-19	Stats: Add a sparse histogram stat object.	Thomas Grass
2011-05-12	stats: delete mysql support	Nathan Binkert
2011-05-12	stats: move code that loops over all stats into python	Nathan Binkert
2011-05-12	stats: better expose statistics to python.	Nathan Binkert
2011-04-28	event: fix PythonEvent	Nathan Binkert
2011-04-15	trace: reimplement the DTRACE function so it doesn't use a vector	Nathan Binkert
2011-04-15	includes: sort all includes	Nathan Binkert
2011-03-18	swig: get rid of m5.internal.random module (swig/random.i)	Steve Reinhardt
2011-01-07	Replace curTick global variable with accessor functions.	Steve Reinhardt
2011-01-07	stats: rename StatEvent() function to schedStatEvent().	Steve Reinhardt
2011-01-03	Make commenting on close namespace brackets consistent.	Steve Reinhardt
2010-12-30	swig: use <> for system %includes instead of ""	Nathan Binkert
2010-11-23	Copyright: Add AMD copyright to the param changes I just made.	Gabe Black
2010-11-23	Params: Add parameter types for IP addresses in various forms.	Gabe Black
2010-11-19	SCons: Support building without an ISA	Ali Saidi
2010-09-09	scons: Stop building the big monolithic swigged params module	Nathan Binkert