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2008-08-04Add -r/-e options to redirect stdout/stderr.Steve Reinhardt
Better than using shell since it automatically uses -d directory for output files (creating it as needed).
2008-08-03sockets: Add a function to disable all listening sockets.Nathan Binkert
When invoking several copies of m5 on the same machine at the same time, there can be a race for TCP ports for the terminal connections or remote gdb. Expose a function to disable those ports, and have the regression scripts disable them. There are some SimObjects that have no other function than to be used with ports (NativeTrace and EtherTap), so they will panic if the ports are disabled.
2008-08-03libm5: Create a libm5 static library for embedding m5.Nathan Binkert
This should allow m5 to be more easily embedded into other simulators. The m5 binary adds a simple main function which then calls into the m5 libarary to start the simulation. In order to make this work correctly, it was necessary embed python code directly into the library instead of the zipfile hack. This is because you can't just append the zipfile to the end of a library the way you can a binary. As a result, Python files that are part of the m5 simulator are now compile, marshalled, compressed, and then inserted into the library's data section with a certain symbol name. Additionally, a new Importer was needed to allow python to get at the embedded python code. Small additional changes include: - Get rid of the PYTHONHOME stuff since I don't think anyone ever used it, and it just confuses things. Easy enough to add back if I'm wrong. - Create a few new functions that are key to initializing and running the simulator: initSignals, initM5Python, m5Main. The original code for creating libm5 was inspired by a patch Michael Adler, though the code here was done by me.
2008-07-31scons: Get rid of generate.py in the build system.Nathan Binkert
I decided that separating some of the scons code into generate.py was just a bad idea because it caused the dependency system to get all messed up. If separation is the right way to go in the future, we should probably use the sconscript mechanism, not the mechanism that I just removed.
2008-07-23RemoteGDB: add an m5 command line option for setting or disabling remote gdb.Michael Adler
2008-06-24Automated merge with http://repo.m5sim.org/m5-stableAli Saidi
2008-06-24Checkpoinging/SWIG: Undo part of changeset 5464 since it broke checkpointing.Ali Saidi
2008-06-18imported patch sim_object_params.diffNathan Binkert
2008-06-15params: Prevent people from setting attributes on vector params.Nathan Binkert
2008-06-15add compile flags to m5Nathan Binkert
2008-06-14Command line option to print out List of SimObjects and their parametersNathan Binkert
2008-06-14main: add .m5/options.py processing. This file is processed beforeNathan Binkert
arguments are parsed so that they can change the default options for various config parameters.
2008-06-14Add .m5 configuration directoryNathan Binkert
2008-06-14python: Separate the options parsing stuff. Remove options parsing stuff fromNathan Binkert
main.py so things are a bit more obvious.
2008-06-14params: Fix the memory bandwidth parameterNathan Binkert
2008-06-14params: Fix floating point parametersNathan Binkert
2008-06-14python: Move various utility classes into a new m5.util package soNathan Binkert
they're all in the same place. This also involves having just one jobfile.py and moving it into the utils directory to avoid duplication. Lots of improvements to the utility as well. --HG-- rename : src/python/m5/attrdict.py => src/python/m5/util/attrdict.py rename : util/pbs/jobfile.py => src/python/m5/util/jobfile.py rename : src/python/m5/util.py => src/python/m5/util/misc.py rename : src/python/m5/multidict.py => src/python/m5/util/multidict.py rename : util/stats/orderdict.py => src/python/m5/util/orderdict.py
2008-06-14Fix various SWIG warningsNathan Binkert
2008-06-14scons: proper fix for hg version stuffNathan Binkert
2008-06-13scons: fix program_info.cc generationNathan Binkert
2008-06-13HG: Add compiled hg revision and date to the standard M5 output.Ali Saidi
2008-06-12Params: Allow nested namespaces in cxx_namespaceGabe Black
2008-06-12Params: Remove an unnecessary include.Gabe Black
2008-02-11Update copyright datesAli Saidi
--HG-- extra : convert_revision : 547e7ddff6b8005a9eaad60970bc51984e84fcd1
2007-11-12Params: Fix check for cycles in the configuration and clarify the ↵Gabe Black
comments/error message. --HG-- extra : convert_revision : 8f35dde408fae874bcba1a248d32a22222d98c35
2007-11-08Python: Allow a range to be a python tuple/list.Ali Saidi
--HG-- extra : convert_revision : 81cf805055e2f4d62e56a02ac82a0b230251f40b
2007-11-04TraceFlags: Fix off-by-one error with number of traceflags.Ali Saidi
--HG-- extra : convert_revision : 668299fc0a9083be858fe2f6e8fde512ddac9e32
2007-10-31String constant const-ness changes to placate g++ 4.2.Steve Reinhardt
Also some bug fixes in MIPS ISA uncovered by g++ warnings (Python string compares don't work in C++!). --HG-- extra : convert_revision : b347cc0108f23890e9b73b3ee96059f0cea96cf6
2007-10-31Traceflags: Add SCons function to created a traceflag instead of having one ↵Ali Saidi
file with them all. --HG-- extra : convert_revision : 427f6bd8f050861ace3bc0d354a1afa5fc8319e6
2007-09-04Serialization: Fix unserialization of object pointersAli Saidi
--HG-- extra : convert_revision : a5aed880b2fc05841067e8597a58a9484e30b84a
2007-09-04Config: Remove some ini file code that no longer worksAli Saidi
--HG-- extra : convert_revision : cb01dc0abeabc97b03d7af10959d92ceb62ea936
2007-08-30python: Write configuration file without reassigning sys.stdout.Miles Kaufmann
Using print >>ini_file syntax instead of reassigning sys.stdout allows the python debugger to be used. --HG-- extra : convert_revision : 63fc268f2e80f338ad1a7abe54b9e979e2239609
2007-08-30params: Deprecate old-style constructors; update most SimObject constructors.Miles Kaufmann
SimObjects not yet updated: - Process and subclasses - BaseCPU and subclasses The SimObject(const std::string &name) constructor was removed. Subclasses that still rely on that behavior must call the parent initializer as : SimObject(makeParams(name)) --HG-- extra : convert_revision : d6faddde76e7c3361ebdbd0a7b372a40941c12ed
2007-08-30python: Eliminate the Python use of eval() and frame manipulationMiles Kaufmann
--HG-- extra : convert_revision : 04520bcfab510580a1c7fb341afbd2487287d1ab
2007-08-17Ports: Only try to do EthPort stuff in full system.Ali Saidi
--HG-- extra : convert_revision : 9ea093ea7c9ab22f8467c5cd5d55b66c71eb3427
2007-08-16Devices: Make EtherInts connect in the same way memory ports currently do.Ali Saidi
--HG-- extra : convert_revision : 765b096785a77df9adc4791c9101b90696bd7be2
2007-08-13python: make the DictImporter's unload() work in any context.Nathan Binkert
import sys since sys may not be defined in whatever context the DictImporter is used. Also reset self.installed after an unload since the same DictImporter could be used again --HG-- extra : convert_revision : 988ed7ad8cd41b69e8fc583e618b1b4a146216da
2007-08-04switching: Remove the drain and resume code from the switching code.Nathan Binkert
This allows us to change memory modes as well. Clean up the code while we're at it. --HG-- extra : convert_revision : fc5fee9ffd08b791f0607ee2688f32aa65d15354
2007-08-04python: use the enum values in the memory mode changing codeNathan Binkert
--HG-- extra : convert_revision : 2e399b2b407922ad076f93d33af73e3ba4c05218
2007-08-04swig: %include all of the enums to get all of the definitions.Nathan Binkert
(instead of %import) --HG-- extra : convert_revision : bc4a39d7be3aad59b34d55aa8dd2c28285f09db9
2007-08-04python: provide access to statsNathan Binkert
--HG-- extra : convert_revision : 18a4e9ef21bd77ec73482557e028d535f0c1f273
2007-08-02python: Improve support for python calling back to C++ member functions.Nathan Binkert
Add support for declaring SimObjects to swig so their members can be wrapped. Make sim_object.i only contain declarations for SimObject. Create system.i to contain declarations for System. Update python code to properly call the C++ given the new changes. --HG-- extra : convert_revision : 82076ee69e8122d56e91b92d6767e356baae420a
2007-08-02python: fix m5.build_env variable.Nathan Binkert
As it is now, some objects will get the incorrect value depending where they were defined. --HG-- extra : convert_revision : a11a14842f9524739cbf54a48be6ec051f371200
2007-08-02python: need to import objects to make some calls workNathan Binkert
--HG-- extra : convert_revision : b5eec971d76626b2f42448052ab2cb2acb652d1b
2007-08-02main: expose the build information as a simple command line parameterNathan Binkert
--HG-- extra : convert_revision : 69189c4a2e9fa9290fe51a2a43a2b08e712c395d
2007-07-23Major changes to how SimObjects are created and initialized. Almost allNathan Binkert
creation and initialization now happens in python. Parameter objects are generated and initialized by python. The .ini file is now solely for debugging purposes and is not used in construction of the objects in any way. --HG-- extra : convert_revision : 7e722873e417cb3d696f2e34c35ff488b7bff4ed
2007-06-10Add a function to get a SimObject's memory mode and reworkNathan Binkert
the set memory mode code to only go through the change if it is necessary --HG-- extra : convert_revision : 28288227bb56b0a04d756776eaf0a4ff9e1f8c20
2007-05-27Move SimObject python files alongside the C++ and fixNathan Binkert
the SConscript files so that only the objects that are actually available in a given build are compiled in. Remove a bunch of files that aren't used anymore. --HG-- rename : src/python/m5/objects/AlphaTLB.py => src/arch/alpha/AlphaTLB.py rename : src/python/m5/objects/SparcTLB.py => src/arch/sparc/SparcTLB.py rename : src/python/m5/objects/BaseCPU.py => src/cpu/BaseCPU.py rename : src/python/m5/objects/FuncUnit.py => src/cpu/FuncUnit.py rename : src/python/m5/objects/IntrControl.py => src/cpu/IntrControl.py rename : src/python/m5/objects/MemTest.py => src/cpu/memtest/MemTest.py rename : src/python/m5/objects/FUPool.py => src/cpu/o3/FUPool.py rename : src/python/m5/objects/FuncUnitConfig.py => src/cpu/o3/FuncUnitConfig.py rename : src/python/m5/objects/O3CPU.py => src/cpu/o3/O3CPU.py rename : src/python/m5/objects/OzoneCPU.py => src/cpu/ozone/OzoneCPU.py rename : src/python/m5/objects/SimpleOzoneCPU.py => src/cpu/ozone/SimpleOzoneCPU.py rename : src/python/m5/objects/BadDevice.py => src/dev/BadDevice.py rename : src/python/m5/objects/Device.py => src/dev/Device.py rename : src/python/m5/objects/DiskImage.py => src/dev/DiskImage.py rename : src/python/m5/objects/Ethernet.py => src/dev/Ethernet.py rename : src/python/m5/objects/Ide.py => src/dev/Ide.py rename : src/python/m5/objects/Pci.py => src/dev/Pci.py rename : src/python/m5/objects/Platform.py => src/dev/Platform.py rename : src/python/m5/objects/SimConsole.py => src/dev/SimConsole.py rename : src/python/m5/objects/SimpleDisk.py => src/dev/SimpleDisk.py rename : src/python/m5/objects/Uart.py => src/dev/Uart.py rename : src/python/m5/objects/AlphaConsole.py => src/dev/alpha/AlphaConsole.py rename : src/python/m5/objects/Tsunami.py => src/dev/alpha/Tsunami.py rename : src/python/m5/objects/T1000.py => src/dev/sparc/T1000.py rename : src/python/m5/objects/Bridge.py => src/mem/Bridge.py rename : src/python/m5/objects/Bus.py => src/mem/Bus.py rename : src/python/m5/objects/MemObject.py => src/mem/MemObject.py rename : src/python/m5/objects/PhysicalMemory.py => src/mem/PhysicalMemory.py rename : src/python/m5/objects/BaseCache.py => src/mem/cache/BaseCache.py rename : src/python/m5/objects/CoherenceProtocol.py => src/mem/cache/coherence/CoherenceProtocol.py rename : src/python/m5/objects/Repl.py => src/mem/cache/tags/Repl.py rename : src/python/m5/objects/Process.py => src/sim/Process.py rename : src/python/m5/objects/Root.py => src/sim/Root.py rename : src/python/m5/objects/System.py => src/sim/System.py extra : convert_revision : 173f8764bafa8ef899198438fa5573874e407321
2007-05-19PhysicalMemory has vector of uniform ports instead of one special one.Steve Reinhardt
configs/example/memtest.py: PhysicalMemory has vector of uniform ports instead of one special one. Other updates to fix obsolete brokenness. src/mem/physical.cc: src/mem/physical.hh: src/python/m5/objects/PhysicalMemory.py: Have vector of uniform ports instead of one special one. src/python/swig/pyobject.cc: Add comment. --HG-- extra : convert_revision : a4a764dcdcd9720bcd07c979d0ece311fc8cb4f1
2007-05-11Move full CPU sim object stuff into the encumbered directoryNathan Binkert
--HG-- extra : convert_revision : 788068dd4f4994d0016dba7e8705359d45a3a45c
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