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2012-06-05sim: Remove FastAllocAli Saidi
While FastAlloc provides a small performance increase (~1.5%) over regular malloc it isn't thread safe. After removing FastAlloc and using tcmalloc I've seen a performance increase of 12% over libc malloc when running twolf for ARM.
2012-06-05stats: Provide a mechanism to get a callback when stats are dumped.Mitchell Hayenga
This mechanism is useful for dumping output that is correlated with stats dumping, but isn't tracked by the gem5 statistics.
2012-05-23Config: Use the attribute naming and include ports in JSONAndreas Hansson
This patch changes the organisation of the JSON output slightly to make it easier to traverse and use the files. Most importantly, the hierarchical dictionaries now use keys that correspond to the attribute names also in the case of VectorParams (used to be e.f. "cpu0 cpu1"). It also adds the name and the path to each SimObject directory entry. Before this patch, to get cpu0, you would have to query dict['system']['cpu0 cpu1'][0] and this could be a dict with 'cpu0' : { cpu parameters }. Now you use dict['system']['cpu'][0] and get { cpu parameters } (where one is "name" : "cpu0"). Additionally this patch includes more verbose information about the ports, specifying their role, and using a JSON array rather than a concatenated string for the peer.
2012-05-23Config: Exit with fatal if a port is already connectedAndreas Hansson
This patch turns the existing warning into a fatal, as there should never be any cases where a (non-vector) port is assigned to and then later connected to something else. If this behaviour is allowed, as it used to be, there are cases where the wrong number of C++ ports are created when instantiating objects with VectorPorts (obviously that could be fixed, but the better approach is to simply not allow it).
2012-05-10DOT: improved dot-based system visualizationUri Wiener
Revised system visualization to reflect structure and memory hierarchy. Improved visualization: less congested and cluttered; more colorful. Nodes reflect components; directed edges reflect dirctional relation, from a master port to a slave port. Requires pydot.
2012-05-10DOT: fixed broken code for visualizing configuration using dotUri Wiener
Fixed broken code which visualizes the system configuration by generating a tree from each component's children, starting from root. Requires DOT (hence pydot).
2012-05-10stats: track if the stats have been enabled and prevent requesting master idAli Saidi
Track the point in the initialization where statistics have been registered. After this point registering new masterIds can no longer work as some SimObjects may have sized stats vectors based on the previous value. If someone tries to register a masterId after this point the simulator executes fatal().
2012-04-14Regression: Add ANSI colours to highlight test statusAndreas Hansson
This patch adds a very basic pretty-printing of the test status (passed or failed) to highlight failing tests even more: green for passed, and red for failed. The printing only uses ANSI it the target output is a tty and supports ANSI colours. Hence, any regression scripts that are outputting to files or sending e-mails etc should still be fine.
2012-04-06python: added __nonzero__ function to SimObject Bool paramsBrad Beckmann
2012-04-05Python: Make the All proxy traverse SimObject children as wellAndreas Hansson
This patch changes the behaviour of the All proxy parameter to not only consider the direct children, but also do a pre-order depth-first traversal of the object tree and append all results from the children. This is used in a later patch to find all the memories in the system, independent of where they are located in the hierarchy.
2012-03-30MEM: Introduce the master/slave port sub-classes in C++William Wang
This patch introduces the notion of a master and slave port in the C++ code, thus bringing the previous classification from the Python classes into the corresponding simulation objects and memory objects. The patch enables us to classify behaviours into the two bins and add assumptions and enfore compliance, also simplifying the two interfaces. As a starting point, isSnooping is confined to a master port, and getAddrRanges to slave ports. More of these specilisations are to come in later patches. The getPort function is not getMasterPort and getSlavePort, and returns a port reference rather than a pointer as NULL would never be a valid return value. The default implementation of these two functions is placed in MemObject, and calls fatal. The one drawback with this specific patch is that it requires some code duplication, e.g. QueuedPort becomes QueuedMasterPort and QueuedSlavePort, and BusPort becomes BusMasterPort and BusSlavePort (avoiding multiple inheritance). With the later introduction of the port interfaces, moving the functionality outside the port itself, a lot of the duplicated code will disappear again.
2012-03-21Python: Fix a conditional expression that requires Python 2.5Andreas Hansson
This patch changes a conditional expression to a conventional if/else block, which does not require Python >= 2.5.
2012-03-19gcc: Clean-up of non-C++0x compliant code, first stepsAndreas Hansson
This patch cleans up a number of minor issues aiming to get closer to compliance with the C++0x standard as interpreted by gcc and clang (compile with std=c++0x and -pedantic-errors). In particular, the patch cleans up enums where the last item was succeded by a comma, namespaces closed by a curcly brace followed by a semi-colon, and the use of the GNU-extension typeof (replaced by templated functions). It does not address variable-length arrays, zero-size arrays, anonymous structs, range expressions in switch statements, and the use of long long. The generated CPU code also has a large number of issues that remain to be fixed, mainly related to overflows in implicit constant conversion (due to shifts).
2012-03-19scripts: Fix to ensure that port connection count is always setAndreas Hansson
This patch ensures that the port connection count is set to zero in those cases when the port is not connected.
2012-02-29SWIG: Ensure ptrdiff_t is a known type in gcc >= 4.6.1Andreas Hansson
This patch fixes a compilation error that occurs with gcc >= 4.6.1, caused by swig not including cstddef and not using the std:: namespace prefix for ptrdiff_t. There is an old patch, http://reviews.m5sim.org/r/913/ that no longer applies cleanly and this might be re-iterating the same issue. We work around the problem by always enforcing the inclusion of cstddef in all swig interface declarations, and also by explicitly using std::ptrdiff_t.
2012-02-20SimObject: make get_config_as_dict() tolerate undefined paramsSteve Reinhardt
Without this patch, undefined params cause a cryptic KeyError in multidict inside get_config_as_dict(). This patch lets undefined params through get_config_as_dict() so they can once again generate meaningful error messages later on in the configuration process.
2012-02-13MEM: Pass the ports from Python to C++ using the Swig paramsAndreas Hansson
This patch adds basic information about the ports in the parameter classes to be passed from the Python world to the corresponding C++ object. Currently, the only information passed is the number of connected peers, which for a Port is either 0 or 1, and for a VectorPort reflects the size of the VectorPort. The default port of the bus had to be renamed to avoid using the name "default" as a field in the parameter class. It is possible to extend the Swig'ed information further and add e.g. a pair with a description and size.
2012-02-13MEM: Introduce the master/slave port roles in the Python classesAndreas Hansson
This patch classifies all ports in Python as either Master or Slave and enforces a binding of master to slave. Conceptually, a master (such as a CPU or DMA port) issues requests, and receives responses, and conversely, a slave (such as a memory or a PIO device) receives requests and sends back responses. Currently there is no differentiation between coherent and non-coherent masters and slaves. The classification as master/slave also involves splitting the dual role port of the bus into a master and slave port and updating all the system assembly scripts to use the appropriate port. Similarly, the interrupt devices have to have their int_port split into a master and slave port. The intdev and its children have minimal changes to facilitate the extra port. Note that this patch does not enforce any port typing in the C++ world, it merely ensures that the Python objects have a notion of the port roles and are connected in an appropriate manner. This check is carried when two ports are connected, e.g. bus.master = memory.port. The following patches will make use of the classifications and specialise the C++ ports into masters and slaves.
2012-01-31Merge with head, hopefully the last time for this batch.Gabe Black
2012-01-31clang: Enable compiling gem5 using clang 2.9 and 3.0Koan-Sin Tan
This patch adds the necessary flags to the SConstruct and SConscript files for compiling using clang 2.9 and later (on Ubuntu et al and OSX XCode 4.2), and also cleans up a bunch of compiler warnings found by clang. Most of the warnings are related to hidden virtual functions, comparisons with unsigneds >= 0, and if-statements with empty bodies. A number of mismatches between struct and class are also fixed. clang 2.8 is not working as it has problems with class names that occur in multiple namespaces (e.g. Statistics in kernel_stats.hh). clang has a bug (http://llvm.org/bugs/show_bug.cgi?id=7247) which causes confusion between the container std::set and the function Packet::set, and this is currently addressed by not including the entire namespace std, but rather selecting e.g. "using std::vector" in the appropriate places.
2012-01-28Merge with the main repo.Gabe Black
--HG-- rename : src/mem/vport.hh => src/mem/fs_translating_port_proxy.hh rename : src/mem/translating_port.cc => src/mem/se_translating_port_proxy.cc rename : src/mem/translating_port.hh => src/mem/se_translating_port_proxy.hh
2012-01-16Merge yet again with the main repository.Gabe Black
2012-01-17MEM: Removing the default port peer from Python portsAndreas Hansson
In preparation for the introduction of Master and Slave ports, this patch removes the default port parameter in the Python port and thus forces the argument list of the Port to contain only the description. The drawback at this point is that the config port and dma port of PCI and DMA devices have to be connected explicitly. This is key for future diversification as the pio and config port are slaves, but the dma port is a master.
2012-01-10Automated merge with ssh://repo.gem5.org/gem5Ali Saidi
2012-01-10config: Fix json output for Python lt 2.6.Ali Saidi
2012-01-09Config: Fix issue with JSON outputAli Saidi
2012-01-09sim: Enable sampling of run-time for code-sections marked using pseudo insts.Prakash Ramrakhyani
This patch adds a mechanism to collect run time samples for specific portions of a benchmark, using work_begin and work_end pseudo instructions.It also enhances the histogram stat to report geometric mean.
2012-01-09config: support outputing a pickle of the configuration treeAli Saidi
2012-01-09SWIG: Make gem5 compile and link with swig 2.0.4Andreas Hansson
To make gem5 compile and run with swig 2.0.4 a few minor fixes are necessary, the fail label issues by swig must not be treated as an error by gcc (tested with gcc 4.2.1), and the vector wrappers must have SWIGPY_SLICE_ARG defined which happens in pycontainer.swg, included through std_container.i. By adding the aforementioned include to the vector wrappers everything seems to work.
2012-01-07Merge with main repository.Gabe Black
2011-11-07SE/FS: Remove FULL_SYSTEM from swig.Gabe Black
2011-10-31GCC: Get everything working with gcc 4.6.1.Gabe Black
And by "everything" I mean all the quick regressions.
2011-10-30Python: Remove import for randomNilay Vaish
2011-10-20SimObject: add export_method* hooks to export C++ methods to PythonSteve Reinhardt
Replace the (broken as of previous changeset) swig_objdecl() method that allowed/forced you to substitute a whole new C++ struct definition for SWIG to wrap with a set of export_method* hooks that let you just declare a set of C++ methods (or other declarations) that get inserted in the auto-generated struct. Restore the System get/setMemoryMode methods, and use this mechanism to specialize SimObject as well, eliminating teh need for sim_object.i. Needed bits of sim_object.i are moved to the new pyobject.i. Also sucked a little SimObject specialization into cxx_param_decl() allowing us to get rid of src/sim/sim_object_params.hh. Now the generation and wrapping of the base SimObject param struct is more in line with how derived objects are handled. --HG-- rename : src/python/swig/sim_object.i => src/python/swig/pyobject.i
2011-10-20scons/swig: refactor some of the scons/SWIG codeSteve Reinhardt
- Move the random bits of SWIG code generation out of src/SConscript file and into methods on the objects being wrapped. - Cleaned up some variable naming and added some comments to make the process a little clearer. - Did a little generated file/module renaming: - vptype_Foo now Foo_vector - init_Foo is now Foo_init This makes it easier to see all the Foo-related files in a sorted directory listing. - Made cxx_predecls and swig_predecls normal SimObject classmethods. - Got rid of swig_objdecls hook, even though this breaks the System objects get/setMemoryMode method exports. Will be fixing this in a future changeset.
2011-09-22params.py: enhance IpAddress param handlingSteve Reinhardt
Print IpAddress params in dot notation for readability. Properly compare IpAddress objects (by value and not object identity). Also fix up derived param classes (IpNetmask and IpWithPort) similarly.
2011-08-19Stats: Add a sparse histogram stat object.Thomas Grass
2011-07-10O3: Make sure fetch doesn't go off into the weeds during speculation.Ali Saidi
2011-07-10Config: Add support for a Self.all proxy objectAli Saidi
2011-07-05slicc: cleanup slicc code and make it less verboseNathan Binkert
2011-07-05grammar: better encapsulation of a grammar and parsingNathan Binkert
This makes it possible to use the grammar multiple times and use the multiple instances concurrently. This makes implementing an include statement as part of a grammar possible.
2011-06-02copyright: Add code for finding all copyright blocks and create a COPYING fileNathan Binkert
The end of the COPYING file was generated with: % python ./util/find_copyrights.py configs src system tests util Update -C command line option to spit out COPYING file
2011-06-01SimObject: allow modules in subclass definitionsSteve Reinhardt
In particular, this avoids crashing when you do an import (like "import pdb") inside a SimObject subclass definition.
2011-05-29Misc: Remove the URL from warnings, fatals, panics, etc.Gabe Black
2011-05-25Name: Replace M5 with gem5 in a few places it's printed on startup.Gabe Black
2011-05-23config: reinstate implicit parenting on parameter assignmentSteve Reinhardt
Last summer's big rewrite of the initialization code (in particular cset 6efc3672733b) got rid of the implicit parenting that used to occur when an unparented SimObject was assigned as a parameter value to another SimObject. The idea was that the new adoptOrphanParams() step would catch these anyway so it was unnecessary. Unfortunately it turns out that adoptOrphanParams() has some inherent instability in that the parent that does the adoption depends on the config tree traversal order. Even making this order deterministic (e.g., by traversing children in alphabetical order) can introduce unwanted and unexpected hierarchy changes between similar configs (e.g., when adding a switch_cpu in place of a cpu), causing problems when trying to restore checkpoints across similar configs. The hierarchy created by implicit parenting is more stable and more controllable, so this patch turns that behavior back on. This patch also cleans up some long-standing holes regarding parenting of SimObjects that are created in class definitions (either in the body of the class, or as default parameters). To avoid breaking some existing config files, this necessitated changing the error on reparenting children to a warning. This change fixes another bug where attempting to print the prior error message would fail on reparenting SimObjectVectors because they lack a _parent attribute. Some further issues with SimObjectVectors were cleaned up by getting rid of the get_parent() call (which could cause errors with some SimObjectVectors where there was no single parent to return) with has_parent() (since all the uses of get_parent() were just boolean tests anyway). Finally, since the adoptOrphanParam() step turned out to be so problematic, we now issue a warning when it actually has to do an adoption. Future cleanup of config files will get rid of current warnings.
2011-05-12stats: delete mysql supportNathan Binkert
we can add it back within python in some future changeset
2011-05-12stats: move code that loops over all stats into pythonNathan Binkert
2011-05-12stats: better expose statistics to python.Nathan Binkert
Build a python list and dict of all stats and expose flags properly. --HG-- rename : src/python/m5/stats.py => src/python/m5/stats/__init__.py
2011-05-07Trace: Remove the options trace-help and trace-flagsNilay Vaish
The options trace-help and trace-flags are no longer required. In there place, the options debug-help and debug-flags have been provided.