gem5 - gem5

Age	Commit message (Expand)	Author
2008-02-11	Update copyright dates	Ali Saidi
2007-11-12	Params: Fix check for cycles in the configuration and clarify the comments/er...	Gabe Black
2007-11-08	Python: Allow a range to be a python tuple/list.	Ali Saidi
2007-11-04	TraceFlags: Fix off-by-one error with number of traceflags.	Ali Saidi
2007-10-31	String constant const-ness changes to placate g++ 4.2.	Steve Reinhardt
2007-10-31	Traceflags: Add SCons function to created a traceflag instead of having one f...	Ali Saidi
2007-09-04	Serialization: Fix unserialization of object pointers	Ali Saidi
2007-09-04	Config: Remove some ini file code that no longer works	Ali Saidi
2007-08-30	python: Write configuration file without reassigning sys.stdout.	Miles Kaufmann
2007-08-30	params: Deprecate old-style constructors; update most SimObject constructors.	Miles Kaufmann
2007-08-30	python: Eliminate the Python use of eval() and frame manipulation	Miles Kaufmann
2007-08-17	Ports: Only try to do EthPort stuff in full system.	Ali Saidi
2007-08-16	Devices: Make EtherInts connect in the same way memory ports currently do.	Ali Saidi
2007-08-13	python: make the DictImporter's unload() work in any context.	Nathan Binkert
2007-08-04	switching: Remove the drain and resume code from the switching code.	Nathan Binkert
2007-08-04	python: use the enum values in the memory mode changing code	Nathan Binkert
2007-08-04	swig: %include all of the enums to get all of the definitions.	Nathan Binkert
2007-08-04	python: provide access to stats	Nathan Binkert
2007-08-02	python: Improve support for python calling back to C++ member functions.	Nathan Binkert
2007-08-02	python: fix m5.build_env variable.	Nathan Binkert
2007-08-02	python: need to import objects to make some calls work	Nathan Binkert
2007-08-02	main: expose the build information as a simple command line parameter	Nathan Binkert
2007-07-23	Major changes to how SimObjects are created and initialized. Almost all	Nathan Binkert
2007-06-10	Add a function to get a SimObject's memory mode and rework	Nathan Binkert
2007-05-27	Move SimObject python files alongside the C++ and fix	Nathan Binkert
2007-05-19	PhysicalMemory has vector of uniform ports instead of one special one.	Steve Reinhardt
2007-05-11	Move full CPU sim object stuff into the encumbered directory	Nathan Binkert
2007-05-11	Float should have a c++ param type	Nathan Binkert
2007-05-10	remove hit_latency and make latency do the right thing	Ali Saidi
2007-05-10	add/update parameters for bus bridge	Ali Saidi
2007-05-07	fix partial writes with a functional memory hack	Ali Saidi
2007-04-18	Move the turbolaser python simobject stuff into the	Nathan Binkert
2007-04-12	Completely re-work how the scons framework incorporates swig	Nathan Binkert
2007-04-12	Fix NextEthernetAddr.	Nathan Binkert
2007-04-12	Add a scons hack to force symlinks to the swig .i files	Nathan Binkert
2007-03-29	Override addPrivateSplitL1Caches function in order to automatically set the t...	Kevin Lim
2007-03-26	first bit of life from the intel gigabit model	Ali Saidi
2007-03-10	Rework the way SCons recurses into subdirectories, making it	Nathan Binkert
2007-03-06	Cleanup	Nathan Binkert
2007-03-06	Python parameters types need analogous C++ types	Nathan Binkert
2007-03-06	Move all of the parameters of the Root SimObject so they are	Nathan Binkert
2007-03-05	Python atexit handlers are called in reverse order.	Nathan Binkert
2007-03-03	Merge zizzer:/bk/newmem	Ali Saidi
2007-03-03	Add Iob and remove the fake device	Ali Saidi
2007-03-03	Implement Niagara I/O interface and rework interrupts	Ali Saidi
2007-03-03	Do the default argument stuff in python	Nathan Binkert
2007-03-02	Factor code out of main.cc and main.i into a bunch of files	Nathan Binkert
2007-02-21	Get rid of the ConsoleListener SimObject and just fold the	Nathan Binkert
2007-02-21	Fix tracing so it starts right away if --trace-start is not	Nathan Binkert
2007-02-21	Automatically generate m5/internal/__init__.py and swig/init.cc	Nathan Binkert