gem5 - gem5

Age	Commit message (Expand)	Author
2016-07-21	cpu: Add SMT support to MinorCPU	Mitch Hayenga
2015-11-27	base: Add support for changing output directories	Andreas Sandberg
2016-02-06	style: remove trailing whitespace	Steve Reinhardt
2016-01-07	dev: Distributed Ethernet link for distributed gem5 simulations	Gabor Dozsa
2016-01-07	pseudo inst,util: Add optional key to initparam pseudo instruction	Gabor Dozsa
2015-12-14	sim: Add an option to forward work items to Python	Andreas Sandberg
2015-11-05	sim: Disable gzip compression for writefile pseudo instruction	Sascha Bischoff
2015-08-26	cpu: quiesce pseudoinsts: Always do full quiesce	Emilio Castillo
2014-11-23	kvm, x86: Adding support for SE mode execution	Alexandru Dutu
2013-10-31	sim: added option to serialize SimLoopExitEvent	Dam Sunwoo
2013-09-18	sim: Fix undefined behavior in the pseudo-inst interface	Andreas Sandberg
2013-06-03	sim: Add debug output when executing pseudo-instructions	Andreas Sandberg
2013-05-02	sim: Add support for m5fail in pseudoInst()	Andreas Sandberg
2013-04-22	sim: Add a helper function to execute pseudo instructions	Andreas Sandberg
2013-01-08	util: add m5_fail op.	Lluís Vilanova
2012-08-28	Clock: Add a Cycles wrapper class and use where applicable	Andreas Hansson
2012-01-31	Merge with head, hopefully the last time for this batch.	Gabe Black
2012-01-31	util: implements "writefile" gem5 op to export file from guest to host filesy...	Dam Sunwoo
2012-01-29	Implement Ali's review feedback.	Gabe Black
2012-01-16	Merge yet again with the main repository.	Gabe Black
2012-01-09	sim: Enable sampling of run-time for code-sections marked using pseudo insts.	Prakash Ramrakhyani
2011-11-18	SE/FS: Get rid of includes of config/full_system.hh.	Gabe Black
2011-11-02	SE/FS: Get rid of FULL_SYSTEM in sim.	Gabe Black
2011-10-31	SE/FS: Make the functions available from the TC consistent between SE and FS.	Gabe Black
2011-09-22	pseudo_inst: clean up workbegin/workend functions	Steve Reinhardt
2011-09-18	Pseudoinst: Add an initParam pseudo inst function.	Gabe Black
2011-04-15	trace: reimplement the DTRACE function so it doesn't use a vector	Nathan Binkert
2011-04-15	debug: create a Debug namespace	Nathan Binkert
2011-04-15	includes: sort all includes	Nathan Binkert
2011-03-17	ARM: Allow conditional quiesce instructions.	Ali Saidi
2011-02-06	m5: added work completed monitoring support	Brad Beckmann
2011-01-07	Replace curTick global variable with accessor functions.	Steve Reinhardt
2011-01-07	stats: rename StatEvent() function to schedStatEvent().	Steve Reinhardt
2011-01-07	pseudoinst: get rid of mainEventQueue references.	Steve Reinhardt
2011-01-03	Make commenting on close namespace brackets consistent.	Steve Reinhardt
2010-04-15	tick: rename Clock namespace to SimClock	Nathan Binkert
2009-09-23	arch: nuke arch/isa_specific.hh and move stuff to generated config/the_isa.hh	Nathan Binkert
2009-06-04	types: clean up types, especially signed vs unsigned	Nathan Binkert
2009-04-21	pseudo: only include kernel stats if FULL_SYSTEM.	Nathan Binkert
2009-02-26	CPA: Add new object for gathering critical path annotations.	Ali Saidi
2009-02-23	debug: Move debug_break into src/base	Nathan Binkert
2009-01-24	pseudo inst: Add new wake cpu instruction for sending a message to wake a cpu.	Nathan Binkert
2008-12-17	Make Alpha pseudo-insts available from SE mode.	Steve Reinhardt
2008-11-10	pseudo inst: Add rpns (read processor nanoseconds) instruction.	Nathan Binkert
2008-10-09	eventq: convert all usage of events to use the new API.	Nathan Binkert
2008-08-11	params: Convert the CPU objects to use the auto generated param structs.	Nathan Binkert
2008-07-11	m5ops: clean up the m5ops stuff.	Nathan Binkert
2008-07-11	style: fix indentation and formatting of the pseudo insts.	Nathan Binkert
2007-09-28	Rename cycles() function to ticks()	Ali Saidi
2007-05-09	update for new reschedule semantics	Ali Saidi