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2015-11-27base: Add support for changing output directoriesAndreas Sandberg
This changeset adds support for changing the simulator output directory. This can be useful when the simulation goes through several stages (e.g., a warming phase, a simulation phase, and a verification phase) since it allows the output from each stage to be located in a different directory. Relocation is done by calling core.setOutputDir() from Python or simout.setOutputDirectory() from C++. This change affects several parts of the design of the gem5's output subsystem. First, files returned by an OutputDirectory instance (e.g., simout) are of the type OutputStream instead of a std::ostream. This allows us to do some more book keeping and control re-opening of files when the output directory is changed. Second, new subdirectories are OutputDirectory instances, which should be used to create files in that sub-directory. Signed-off-by: Andreas Sandberg <andreas@sandberg.pp.se> [sascha.bischoff@arm.com: Rebased patches onto a newer gem5 version] Signed-off-by: Sascha Bischoff <sascha.bischoff@arm.com> Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
2016-02-06style: remove trailing whitespaceSteve Reinhardt
Result of running 'hg m5style --skip-all --fix-white -a'.
2016-01-07dev: Distributed Ethernet link for distributed gem5 simulationsGabor Dozsa
Distributed gem5 (abbreviated dist-gem5) is the result of the convergence effort between multi-gem5 and pd-gem5 (from Univ. of Wisconsin). It relies on the base multi-gem5 infrastructure for packet forwarding, synchronisation and checkpointing but combines those with the elaborated network switch model from pd-gem5. --HG-- rename : src/dev/net/multi_etherlink.cc => src/dev/net/dist_etherlink.cc rename : src/dev/net/multi_etherlink.hh => src/dev/net/dist_etherlink.hh rename : src/dev/net/multi_iface.cc => src/dev/net/dist_iface.cc rename : src/dev/net/multi_iface.hh => src/dev/net/dist_iface.hh rename : src/dev/net/multi_packet.hh => src/dev/net/dist_packet.hh
2016-01-07pseudo inst,util: Add optional key to initparam pseudo instructionGabor Dozsa
The key parameter can be used to read out various config parameters from within the simulated software.
2015-12-14sim: Add an option to forward work items to PythonAndreas Sandberg
There are cases where we want the Python world to handle work items instead of the C++ world. However, that's currently not possible. This changeset adds the forward_work_items option to the System class. Then it is set to True, work items will generate workbegin/workend simulation exists with the work item ID as the exit code and the old C++ handling is completely bypassed. --HG-- extra : rebase_source : 8de637a744fc4b6ff2bc763f00cdf8ddf2bff885
2015-11-05sim: Disable gzip compression for writefile pseudo instructionSascha Bischoff
The writefile pseudo instruction uses OutputDirectory::create and OutputDirectory::openFile to create the output files. However, by default these will check the file extention for .gz, and create a gzip compressed stream if the file ending matches. When writing out files, we want to write them out exactly as they are in the guest simulation, and never want to compress them with gzio. Additionally, this causes m5 writefile to fail when checking the error flags for the output steam. With this patch we add an additional no_gz argument to OutputDirectory::create and OutputDirectory::openFile which allows us to override the gzip compression. Therefore, for m5 writefile we disable the filename check, and always create a standard ostream.
2015-08-26cpu: quiesce pseudoinsts: Always do full quiesceEmilio Castillo
The O3CPU blocks the Fetch when it sees a quiesce instruction (IsQuiesce flag). When the inst. is executed, a quiesce event is created to reactivate the context and unblock the Fetch. If the quiesceNs or quiesceCycles are called with a value of 0, the QuiesceEvent will not be created and the Fetch stage will remain blocked. Committed by Joel Hestness <jthestness@gmail.com>
2014-11-23kvm, x86: Adding support for SE mode executionAlexandru Dutu
This patch adds methods in KvmCPU model to handle KVM exits caused by syscall instructions and page faults. These types of exits will be encountered if KvmCPU is run in SE mode.
2013-10-31sim: added option to serialize SimLoopExitEventDam Sunwoo
SimLoopExitEvents weren't serialized by default. Some benchmarks utilize a delayed m5 exit pseudo op call to terminate the simulation and this event was lost when resuming from a checkpoint generated after the pseudo op call. This patch adds the capability to serialize the SimLoopExitEvents and enable serialization for m5_exit and m5_fail pseudo ops by default. Does not affect other generic SimLoopExitEvents.
2013-09-18sim: Fix undefined behavior in the pseudo-inst interfaceAndreas Sandberg
The order between updating and using arg_num in PseudoInst::pseudoInst() is currently undefined. This changeset explicitly updates arg_num after it has been used to extract an argument. --HG-- extra : rebase_source : 67c46dc3333d16ce56687ee8aea41ce6c6d133bb
2013-06-03sim: Add debug output when executing pseudo-instructionsAndreas Sandberg
2013-05-02sim: Add support for m5fail in pseudoInst()Andreas Sandberg
2013-04-22sim: Add a helper function to execute pseudo instructionsAndreas Sandberg
All architectures execute m5 pseudo instructions by setting up arguments according to the ABI and executing a magic instruction that contains an operation number. Handling of such instructions is currently spread across the different ISA implementations. This changeset introduces the PseudoInst::pseudoInst function which handles most of this in an architecture independent way. This is function is mainly intended to be used from KVM, but can also be used from the simulated CPUs.
2013-01-08util: add m5_fail op.Lluís Vilanova
Used as a command in full-system scripts helps the user ensure the benchmarks have finished successfully. For example, one can use: /path/to/benchmark args || /sbin/m5 fail 1 and thus ensure gem5 will exit with an error if the benchmark fails.
2012-08-28Clock: Add a Cycles wrapper class and use where applicableAndreas Hansson
This patch addresses the comments and feedback on the preceding patch that reworks the clocks and now more clearly shows where cycles (relative cycle counts) are used to express time. Instead of bumping the existing patch I chose to make this a separate patch, merely to try and focus the discussion around a smaller set of changes. The two patches will be pushed together though. This changes done as part of this patch are mostly following directly from the introduction of the wrapper class, and change enough code to make things compile and run again. There are definitely more places where int/uint/Tick is still used to represent cycles, and it will take some time to chase them all down. Similarly, a lot of parameters should be changed from Param.Tick and Param.Unsigned to Param.Cycles. In addition, the use of curTick is questionable as there should not be an absolute cycle. Potential solutions can be built on top of this patch. There is a similar situation in the o3 CPU where lastRunningCycle is currently counting in Cycles, and is still an absolute time. More discussion to be had in other words. An additional change that would be appropriate in the future is to perform a similar wrapping of Tick and probably also introduce a Ticks class along with suitable operators for all these classes.
2012-01-31Merge with head, hopefully the last time for this batch.Gabe Black
2012-01-31util: implements "writefile" gem5 op to export file from guest to host ↵Dam Sunwoo
filesystem Usage: m5 writefile <filename> File will be created in the gem5 output folder with the identical filename. Implementation is largely based on the existing "readfile" functionality. Currently does not support exporting of folders.
2012-01-29Implement Ali's review feedback.Gabe Black
Try to decrease indentation, and remove some redundant FullSystem checks.
2012-01-16Merge yet again with the main repository.Gabe Black
2012-01-09sim: Enable sampling of run-time for code-sections marked using pseudo insts.Prakash Ramrakhyani
This patch adds a mechanism to collect run time samples for specific portions of a benchmark, using work_begin and work_end pseudo instructions.It also enhances the histogram stat to report geometric mean.
2011-11-18SE/FS: Get rid of includes of config/full_system.hh.Gabe Black
2011-11-02SE/FS: Get rid of FULL_SYSTEM in sim.Gabe Black
2011-10-31SE/FS: Make the functions available from the TC consistent between SE and FS.Gabe Black
2011-09-22pseudo_inst: clean up workbegin/workend functionsSteve Reinhardt
Use exitSimLoop() function instead of explicitly scheduling on mainEventQueue (which won't work once we go to multiple event queues). Also introduced a local params variable to shorten a lot of expressions.
2011-09-18Pseudoinst: Add an initParam pseudo inst function.Gabe Black
2011-04-15trace: reimplement the DTRACE function so it doesn't use a vectorNathan Binkert
At the same time, rename the trace flags to debug flags since they have broader usage than simply tracing. This means that --trace-flags is now --debug-flags and --trace-help is now --debug-help
2011-04-15debug: create a Debug namespaceNathan Binkert
2011-04-15includes: sort all includesNathan Binkert
2011-03-17ARM: Allow conditional quiesce instructions.Ali Saidi
This patch prevents not executed conditional instructions marked as IsQuiesce from stalling the pipeline indefinitely. If the instruction is not executed the quiesceSkip psuedoinst is called which schedules a wakes up call to the fetch stage.
2011-02-06m5: added work completed monitoring supportBrad Beckmann
2011-01-07Replace curTick global variable with accessor functions.Steve Reinhardt
This step makes it easy to replace the accessor functions (which still access a global variable) with ones that access per-thread curTick values.
2011-01-07stats: rename StatEvent() function to schedStatEvent().Steve Reinhardt
This follows the style rules and is more descriptive.
2011-01-07pseudoinst: get rid of mainEventQueue references.Steve Reinhardt
Avoid direct references to mainEventQueue in pseudo-insts by indirecting through associated CPU object. Made exitSimLoop() more flexible to enable some of these.
2011-01-03Make commenting on close namespace brackets consistent.Steve Reinhardt
Ran all the source files through 'perl -pi' with this script: s|\s*(};?\s*)?/\*\s*(end\s*)?namespace\s*(\S+)\s*\*/(\s*})?|} // namespace $3|; s|\s*};?\s*//\s*(end\s*)?namespace\s*(\S+)\s*|} // namespace $2\n|; s|\s*};?\s*//\s*(\S+)\s*namespace\s*|} // namespace $1\n|; Also did a little manual editing on some of the arch/*/isa_traits.hh files and src/SConscript.
2010-04-15tick: rename Clock namespace to SimClockNathan Binkert
2009-09-23arch: nuke arch/isa_specific.hh and move stuff to generated config/the_isa.hhNathan Binkert
2009-06-04types: clean up types, especially signed vs unsignedNathan Binkert
2009-04-21pseudo: only include kernel stats if FULL_SYSTEM.Nathan Binkert
2009-02-26CPA: Add new object for gathering critical path annotations.Ali Saidi
2009-02-23debug: Move debug_break into src/baseNathan Binkert
2009-01-24pseudo inst: Add new wake cpu instruction for sending a message to wake a cpu.Nathan Binkert
It's instantaneous and so it's somewhat bogus, but it's a first step.
2008-12-17Make Alpha pseudo-insts available from SE mode.Steve Reinhardt
2008-11-10pseudo inst: Add rpns (read processor nanoseconds) instruction.Nathan Binkert
This instruction basically returns the number of nanoseconds that the CPU has been running.
2008-10-09eventq: convert all usage of events to use the new API.Nathan Binkert
For now, there is still a single global event queue, but this is necessary for making the steps towards a parallelized m5.
2008-08-11params: Convert the CPU objects to use the auto generated param structs.Nathan Binkert
A whole bunch of stuff has been converted to use the new params stuff, but the CPU wasn't one of them. While we're at it, make some things a bit more stylish. Most of the work was done by Gabe, I just cleaned stuff up a bit more at the end.
2008-07-11m5ops: clean up the m5ops stuff.Nathan Binkert
- insert warnings for deprecated m5ops - reserve opcodes for Ali's stuff - remove code for stuff that has been deprecated forever - simplify m5op_alpha
2008-07-11style: fix indentation and formatting of the pseudo insts.Nathan Binkert
2007-09-28Rename cycles() function to ticks()Ali Saidi
--HG-- extra : convert_revision : 790eddb793d4f5ba35813d001037bd8601bd76a5
2007-05-09update for new reschedule semanticsAli Saidi
--HG-- extra : convert_revision : 8c18b2513d638f67cc096e7f1483b47390a374ca
2007-02-21add pseduo instruction support for sparcAli Saidi
util/m5/Makefile.alpha: Clean up to make it a bit easier to muck with util/m5/Makefile.alpha: Make the makefile more reasonable util/m5/Makefile.alpha: Remove authors from copyright. util/m5/Makefile.alpha: Updated Authors from bk prs info util/m5/Makefile.alpha: bk cp Makefile Makefile.alpha src/arch/sparc/tlb.cc: Clean up the cache code a little bit and make sure the uncacbale bit is set when appropriate src/arch/alpha/isa/decoder.isa: src/sim/pseudo_inst.cc: src/sim/pseudo_inst.hh: Rename AlphaPseudo -> PseudoInst since it's all generic src/arch/sparc/isa/bitfields.isa: src/arch/sparc/isa/decoder.isa: src/arch/sparc/isa/includes.isa: src/arch/sparc/isa/operands.isa: Add support for pseudo instructions in sparc util/m5/Makefile.alpha: util/m5/Makefile.sparc: split off alpha make file and sparc make file for m5 app util/m5/m5.c: ivle and ivlb aren't used anymore util/m5/m5op.h: stdint seems like a more generic better fit here util/m5/m5op_alpha.S: move the op ids into their own header file since we can share them between sparc and alpha --HG-- rename : util/m5/Makefile => util/m5/Makefile.sparc rename : util/m5/m5op.S => util/m5/m5op_alpha.S extra : convert_revision : 490ba2e8b8bc6e28bfc009cedec6b686b28e7834