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path: root/src/sim/serialize.hh
AgeCommit message (Expand)Author
2019-03-12sim: Add size to array unserialization error messageDaniel R. Carvalho
2019-01-18base: Fix unitialized storageDaniel R. Carvalho
2018-11-14sim: Move BitUnion overloading to show/parseParamsGiacomo Travaglini
2018-11-14sim: Move paramIn/Out definition to header fileGiacomo Travaglini
2018-10-01sim: Extend (UN)SERIALIZE_ARRAY to BitUnionsGiacomo Travaglini
2018-01-20sim: Use the new BitUnion templates in serialize.hh.Gabe Black
2018-01-20base: Rework bitunions so they can be more flexible.Gabe Black
2016-11-09style: [patch 3/22] reduce include dependencies in some headersBrandon Potter
2016-10-04sim: Add a checkpoint function to test for entriesAndreas Sandberg
2016-02-06style: fix missing spaces in control statementsSteve Reinhardt
2015-12-04sim: Get rid of the non-const serialize() methodAndreas Sandberg
2015-09-02sim: tag-based checkpoint versioningCurtis Dunham
2015-09-02sim: support checkpointing std::set<std::string>'sCurtis Dunham
2015-09-02sim: make warning for absent optional parameters optionalCurtis Dunham
2015-09-01sim: Remove broken AutoSerialize support from the event queueAndreas Sandberg
2015-09-01sim: Remove unused SerializeBuilder interfaceAndreas Sandberg
2015-09-01sim: Replace fromInt/fromSimObject with decltypeAndreas Sandberg
2015-09-01sim: Move SimObject resolver to sim_object.hhAndreas Sandberg
2015-07-24base: refactor process class (specifically FdMap and friends)Brandon Potter
2015-07-07sim: Add macros to serialize objects into a sectionAndreas Sandberg
2015-07-07sim: Fix broken event unserializationAndreas Sandberg
2015-07-07sim: Refactor the serialization base classAndreas Sandberg
2015-07-07sim: Add serialization macros for std containersAndreas Sandberg
2015-06-01sim, arm: add checkpoint upgrader for d02b45a5Curtis Dunham
2014-10-16sim: Add support for serializing BitUnionXXAndreas Sandberg
2014-10-16config: Add a --without-python option to build processAndrew Bardsley
2014-04-29arm: use condition code registers for ARM ISACurtis Dunham
2014-02-05sim: bump checkpoint version for multiple event queuesCurtis Dunham
2014-07-01util: Add DVFS perfLevel to checkpoint upgrade scriptRadhika Jagtap
2014-04-19ruby: recorder: Fix (de-)serializing with different cache block-sizesMarco Elver
2014-01-24arm: Add support for ARMv8 (AArch64 & AArch32)ARM gem5 Developers
2013-11-25sim: simulate with multiple threads and event queuesSteve Reinhardt ext:(%2C%20Nilay%20Vaish%20%3Cnilay%40cs.wisc.edu%3E%2C%20Ali%20Saidi%20%3CAli.Saidi%40ARM.com%3E)
2013-10-31ARM: add support for TEEHBR accessChander Sudanthi
2013-10-31dev: Fix race conditions in IDE device on newer kernelsGeoffrey Blake
2013-08-07x86: add tlb checkpointingNilay Vaish
2013-02-19scons: Add warning for missing declarationsAndreas Hansson
2013-01-07arm: Remove the register mapping hack used when copying TCsAndreas Sandberg
2013-01-07arch: Move the ISA object to a separate sectionAndreas Sandberg
2012-11-02sim: Move the draining interface into a separate base classAndreas Sandberg
2012-11-02ARM: dump stats and process info on context switchesDam Sunwoo
2012-10-15Mem: Separate the host and guest views of memory backing storeAndreas Hansson
2012-07-09Fix: Address a few benign memory leaksAndreas Hansson
2012-06-05cpt: update some comments in the checkpoint migration scriptAli Saidi
2012-06-05sim: Provide a framework for detecting out of data checkpoints and migrating ...Ali Saidi
2012-03-19gcc: Clean-up of non-C++0x compliant code, first stepsAndreas Hansson
2011-04-15includes: sort all includesNathan Binkert
2011-02-11Serialization: Allow serialization of stl listsAli Saidi
2011-01-07Replace curTick global variable with accessor functions.Steve Reinhardt
2010-08-17sim: revamp unserialization procedureSteve Reinhardt
2010-07-05checkpointing: minor cleanup.Steve Reinhardt
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