summaryrefslogtreecommitdiff
path: root/src/sim/syscall_emul.hh
AgeCommit message (Collapse)Author
2016-03-17base: add symbol support for dynamic librariesBrandon Potter
Libraries are loaded into the process address space using the mmap system call. Conveniently, this happens to be a good time to update the process symbol table with the library's incoming symbols so we handle the table update from within the system call. This works just like an application's normal symbols. The only difference between a dynamic library and a main executable is when the symbol table update occurs. The symbol table update for an executable happens at program load time and is finished before the process ever begins executing. Since dynamic linking happens at runtime, the symbol loading happens after the library is first loaded into the process address space. The library binary is examined at this time for a symbol section and that section is parsed for symbol types with specific bindings (global, local, weak). Subsequently, these symbols are added to the table and are available for use by gem5 for things like trace generation. Checkpointing should work just as it did previously. The address space (and therefore the library) will be recorded and the symbol table will be entirely recorded. (It's not possible to do anything clever like checkpoint a program and then load the program back with different libraries with LD_LIBRARY_PATH, because the library becomes part of the address space after being loaded.)
2016-03-17syscall_emul: move mmapGrowsDown() to LiveProcessSteve Reinhardt
The mmapGrowsDown() method was a static method on the OperatingSystem class (and derived classes), which worked OK for the templated syscall emulation methods, but made it hard to access elsewhere. This patch moves the method to be a virtual function on the LiveProcess method, where it can be overridden for specific platforms (for now, Alpha). This patch also changes the value of mmapGrowsDown() from being false by default and true only on X86Linux32 to being true by default and false only on Alpha, which seems closer to reality (though in reality most people use ASLR and this doesn't really matter anymore). In the process, also got rid of the unused mmap_start field on LiveProcess and OperatingSystem mmapGrowsUp variable.
2016-03-17syscall_emul: fix bugs for mmap2 system call and x86-32 syscallsBrandon Potter
2016-03-17syscall_emul: extend mmap system call to support file backed mmapsBrandon Potter
For O3, which has a stat that counts reg reads, there is an additional reg read per mmap() call since there's an arg we no longer ignore. Otherwise, stats should not be affected.
2016-03-17syscall_emul: add extra debug support for syscallsAlexandru Dutu
Breaks the debug output from system calls into two levels: Base and Verbose. A macro is added specifically for system calls which allows developers to easily add new debug messages in a consistent manner. The macro also contains a field to print thread IDs along with the CPU ID.
2016-03-08syscall_emul: Fix erroneous use of deleteAndreas Hansson
clang correctly points out an erroneous use of delete.
2016-02-13syscall_emul: Implement clock_getres() system callMichael LeBeane
This patch implements the clock_getres() system call for arm and x86 in linux SE mode.
2016-02-06style: fix missing spaces in control statementsSteve Reinhardt
Result of running 'hg m5style --skip-all --fix-control -a'.
2015-07-24style: change Process function calls to use camelCaseBrandon Potter
The Process class methods were using an improper style and this subsequently bled into the system call code. The following regular expressions should be helpful if someone transitions private system call patches on top of these changesets: s/alloc_fd/allocFD/ s/sim_fd(/simFD(/ s/sim_fd_obj/getFDEntry/ s/fix_file_offsets/fixFileOffsets/ s/find_file_offsets/findFileOffsets/
2015-07-24syscall_emul: standardized file descriptor name and add return checks.Brandon Potter
The patch clarifies whether file descriptors are host file descriptors or target file descriptors in the system call code. (Host file descriptors are file descriptors which have been allocated through real system calls where target file descriptors are allocated from an array in the Process class.)
2015-07-24base: refactor process class (specifically FdMap and friends)Brandon Potter
This patch extends the previous patch's alterations around fd_map. It cleans up some of the uglier code in the process file and replaces it with a more concise C++11 version. As part of the changes, the FdMap class is pulled out of the Process class and receives its own file.
2015-05-26arm: Implement some missing syscalls (SE mode)Giacomo Gabrielli
Adding a few syscalls that were previously considered unimplemented.
2015-05-05syscall_emul: fix warn_once behaviorSteve Reinhardt
The current ignoreWarnOnceFunc doesn't really work as expected, since it will only generate one warning total, for whichever "warn-once" syscall is invoked first. This patch fixes that behavior by keeping a "warned" flag in the SyscallDesc object, allowing suitably flagged syscalls to warn exactly once per syscall.
2015-04-22syscall_emul: implement clock_gettime system callBrandon Potter
2015-04-22syscall_emul: update getrlimit to use warnBrandon Potter
Don't use std::cerr directly, and just return EINVAL instead of aborting.
2015-04-22syscall_emul: fix warning with wrong syscall nameBrandon Potter
Also nix extra whitespace.
2015-01-03arm: Add unlinkat syscall implementationmike upton
added ARM aarch64 unlinkat syscall support, modeled on other <xxx>at syscalls. This gets all of the cpu2006 int workloads passing in SE mode on aarch64. Committed by: Nilay Vaish <nilay@cs.wisc.edu>
2014-12-27syscall_emul: Return correct writev valueJoel Hestness
According to Linux man pages, if writev is successful, it returns the total number of bytes written. Otherwise, it returns an error code. Instead of returning 0, return the result from the actual call to writev in the system call.
2014-10-22syscall_emul: Put BufferArg classes in a separate header.Steve Reinhardt
Move the BufferArg classes that support syscall buffer args (i.e., pointers into simulated user space) out of syscall_emul.hh and into a new header syscall_emul_buf.hh so they are accessible to emulated driver implementations. Take the opportunity to add some comments as well.
2014-10-22syscall_emul: add EmulatedDriver objectSteve Reinhardt
Fake SE-mode device drivers can now be added by deriving from this abstract object.
2014-10-22sim: revert 6709bbcf564dNilay Vaish
The identifier SYS_getdents is not available on Mac OS X. Therefore, its use results in compilation failure. It seems there is no straight forward way to implement the system call getdents using readdir() or similar C functions. Hence the commit 6709bbcf564d is being rolled back.
2014-10-20sim: invalid alignment checks in mmap and mremapTom Jablin
Presently, the alignment checks in the mmap and mremap implementations in syscall_emul.hh are wrong. The checks are implemented as: if ((start % TheISA::PageBytes) != 0 || (length % TheISA::PageBytes) != 0) { warn("mmap failing: arguments not page-aligned: " "start 0x%x length 0x%x", start, length); return -EINVAL; } This checks that both the start and the length arguments of the mmap syscall are checked for page-alignment. However, the POSIX specification says: The off argument is constrained to be aligned and sized according to the value returned by sysconf() when passed _SC_PAGESIZE or _SC_PAGE_SIZE. When MAP_FIXED is specified, the application shall ensure that the argument addr also meets these constraints. The implementation performs mapping operations over whole pages. Thus, while the argument len need not meet a size or alignment constraint, the implementation shall include, in any mapping operation, any partial page specified by the range [pa,pa+len). So the length parameter should not be checked for page-alignment. By contrast, the current implementation fails to check the offset argument, which must be page aligned. Committed by: Nilay Vaish <nilay@cs.wisc.edu>
2014-10-20sim: mmap: correct behavior for fixed addressMichael Adler
Change mmap fixed address request to return an error if the mapping is impossible due to conflict instead of what I believe used to be silent corruption. Committed by: Nilay Vaish <nilay@cs.wisc.edu>
2014-10-20sim: implement getdents/getdents64 in user modeMichael Adler
Has been tested only for alpha. Committed by: Nilay Vaish <nilay@cs.wisc.edu>
2014-09-03arch: Cleanup unused ISA traits constantsAndreas Hansson
This patch prunes unused values, and also unifies how the values are defined (not using an enum for ALPHA), aligning the use of int vs Addr etc. The patch also removes the duplication of PageBytes/PageShift and VMPageSize/LogVMPageSize. For all ISAs the two pairs had identical values and the latter has been removed.
2014-04-17sim, arm: implement more of the at variety syscallsAli Saidi
Needed for new AArch64 binaries
2014-01-24sim: Add openat/fstatat syscalls and fix mremapChris Adeniyi-Jones
This patch adds support for the openat and fstatat syscalls and broadens the support for mremap to make it work on OS X.
2013-01-08arm: add access syscall for ARM SE modeMitch Hayenga
This patch adds the "access" syscall for ARM SE as required by some spec2006 benchmarks.
2012-09-21SE: Ignore FUTEX_PRIVATE_FLAG of sys_futexLluc Alvarez
This patch ignores the FUTEX_PRIVATE_FLAG of the sys_futex system call in SE mode. With this patch, when sys_futex with the options FUTEX_WAIT_PRIVATE or FUTEX_WAKE_PRIVATE is emulated, the FUTEX_PRIVATE_FLAG is ignored and so their behaviours are the regular FUTEX_WAIT and FUTEX_WAKE. Emulating FUTEX_WAIT_PRIVATE and FUTEX_WAKE_PRIVATE as if they were non-private is safe from a functional point of view. The FUTEX_PRIVATE_FLAG does not change the semantics of the futex, it's just a mechanism to improve performance under certain circunstances that can be ignored in SE mode.
2012-09-10NetBSD: Build on NetBSDPalle Lyckegaard
Minor patch against so building on NetBSD is possible.
2012-08-06syscall_emul: clean up open() code a bit.Steve Reinhardt
2012-08-06str: add an overloaded startswith() utility methodSteve Reinhardt
for various string types and use it in a few places.
2012-08-06syscall emulation: Clean up ioctl handling, and implement for x86.Marc Orr
Enable different whitelists for different OS/arch combinations, since some use the generic Linux definitions only, and others use definitions inherited from earlier Unix flavors on those architectures. Also update x86 function pointers so ioctl is no longer unimplemented on that platform. This patch is a revised version of Vince Weaver's earlier patch.
2012-07-10syscall emulation: Add the futex system call.Marc Orr
2012-05-19Syscalls: warn when the length argument to mmap is excessive.Gabe Black
If the length argument to mmap is larger than the arbitrary but reasonable limit of 4GB, there's a good chance that the value is nonsense and not intentional. Rather than attempting to satisfy the mmap anyway, this change makes gem5 warn to make it more apparent what's going wrong.
2012-02-24MEM: Make port proxies use references rather than pointersAndreas Hansson
This patch is adding a clearer design intent to all objects that would not be complete without a port proxy by making the proxies members rathen than dynamically allocated. In essence, if NULL would not be a valid value for the proxy, then we avoid using a pointer to make this clear. The same approach is used for the methods using these proxies, such as loadSections, that now use references rather than pointers to better reflect the fact that NULL would not be an acceptable value (in fact the code would break and that is how this patch started out). Overall the concept of "using a reference to express unconditional composition where a NULL pointer is never valid" could be done on a much broader scale throughout the code base, but for now it is only done in the locations affected by the proxies.
2012-01-31Merge with head, hopefully the last time for this batch.Gabe Black
2012-01-31clang: Enable compiling gem5 using clang 2.9 and 3.0Koan-Sin Tan
This patch adds the necessary flags to the SConstruct and SConscript files for compiling using clang 2.9 and later (on Ubuntu et al and OSX XCode 4.2), and also cleans up a bunch of compiler warnings found by clang. Most of the warnings are related to hidden virtual functions, comparisons with unsigneds >= 0, and if-statements with empty bodies. A number of mismatches between struct and class are also fixed. clang 2.8 is not working as it has problems with class names that occur in multiple namespaces (e.g. Statistics in kernel_stats.hh). clang has a bug (http://llvm.org/bugs/show_bug.cgi?id=7247) which causes confusion between the container std::set and the function Packet::set, and this is currently addressed by not including the entire namespace std, but rather selecting e.g. "using std::vector" in the appropriate places.
2012-01-28Merge with the main repo.Gabe Black
--HG-- rename : src/mem/vport.hh => src/mem/fs_translating_port_proxy.hh rename : src/mem/translating_port.cc => src/mem/se_translating_port_proxy.cc rename : src/mem/translating_port.hh => src/mem/se_translating_port_proxy.hh
2012-01-17MEM: Add port proxies instead of non-structural portsAndreas Hansson
Port proxies are used to replace non-structural ports, and thus enable all ports in the system to correspond to a structural entity. This has the advantage of accessing memory through the normal memory subsystem and thus allowing any constellation of distributed memories, address maps, etc. Most accesses are done through the "system port" that is used for loading binaries, debugging etc. For the entities that belong to the CPU, e.g. threads and thread contexts, they wrap the CPU data port in a port proxy. The following replacements are made: FunctionalPort > PortProxy TranslatingPort > SETranslatingPortProxy VirtualPort > FSTranslatingPortProxy --HG-- rename : src/mem/vport.cc => src/mem/fs_translating_port_proxy.cc rename : src/mem/vport.hh => src/mem/fs_translating_port_proxy.hh rename : src/mem/translating_port.cc => src/mem/se_translating_port_proxy.cc rename : src/mem/translating_port.hh => src/mem/se_translating_port_proxy.hh
2012-01-07Merge with main repository.Gabe Black
2011-10-30SE/FS: Build the base process class in FS.Gabe Black
2011-10-22SE: move page allocation from PageTable to ProcessSteve Reinhardt
PageTable supported an allocate() call that called back through the Process to allocate memory, but did not have a method to map addresses without allocating new pages. It makes more sense for Process to do the allocation, so this method was renamed allocateMem() and moved to Process, and uses a new map() call on PageTable. The remaining uses of the process pointer in PageTable were only to get the name and the PID, so by passing these in directly in the constructor, we can make PageTable completely independent of Process.
2011-10-22syscall_emul: implement MAP_FIXED option to mmap()Steve Reinhardt
2011-05-23syscall emul: fix Power Linux mmap constant, plus other cleanupSteve Reinhardt
We were getting a spurious warning in the regressions that turned out to be due to having the wrong value for TGT_MAP_ANONYMOUS for Power Linux, but in the process of tracking it down I ended up doing some cleanup of the mmap handling in general.
2011-04-15trace: reimplement the DTRACE function so it doesn't use a vectorNathan Binkert
At the same time, rename the trace flags to debug flags since they have broader usage than simply tracing. This means that --trace-flags is now --debug-flags and --trace-help is now --debug-help
2011-04-15includes: sort all includesNathan Binkert
2011-03-17ARM: Add minimal ARM_SE support for m5threads.Chris Emmons
Updated some of the assembly code sequences to use armv7 instructions and coprocessor 15 for storing the TLS pointer.
2011-01-07Replace curTick global variable with accessor functions.Steve Reinhardt
This step makes it easy to replace the accessor functions (which still access a global variable) with ones that access per-thread curTick values.
2010-10-31ISA,CPU,etc: Create an ISA defined PC type that abstracts out ISA behaviors.Gabe Black
This change is a low level and pervasive reorganization of how PCs are managed in M5. Back when Alpha was the only ISA, there were only 2 PCs to worry about, the PC and the NPC, and the lsb of the PC signaled whether or not you were in PAL mode. As other ISAs were added, we had to add an NNPC, micro PC and next micropc, x86 and ARM introduced variable length instruction sets, and ARM started to keep track of mode bits in the PC. Each CPU model handled PCs in its own custom way that needed to be updated individually to handle the new dimensions of variability, or, in the case of ARMs mode-bit-in-the-pc hack, the complexity could be hidden in the ISA at the ISA implementation's expense. Areas like the branch predictor hadn't been updated to handle branch delay slots or micropcs, and it turns out that had introduced a significant (10s of percent) performance bug in SPARC and to a lesser extend MIPS. Rather than perpetuate the problem by reworking O3 again to handle the PC features needed by x86, this change was introduced to rework PC handling in a more modular, transparent, and hopefully efficient way. PC type: Rather than having the superset of all possible elements of PC state declared in each of the CPU models, each ISA defines its own PCState type which has exactly the elements it needs. A cross product of canned PCState classes are defined in the new "generic" ISA directory for ISAs with/without delay slots and microcode. These are either typedef-ed or subclassed by each ISA. To read or write this structure through a *Context, you use the new pcState() accessor which reads or writes depending on whether it has an argument. If you just want the address of the current or next instruction or the current micro PC, you can get those through read-only accessors on either the PCState type or the *Contexts. These are instAddr(), nextInstAddr(), and microPC(). Note the move away from readPC. That name is ambiguous since it's not clear whether or not it should be the actual address to fetch from, or if it should have extra bits in it like the PAL mode bit. Each class is free to define its own functions to get at whatever values it needs however it needs to to be used in ISA specific code. Eventually Alpha's PAL mode bit could be moved out of the PC and into a separate field like ARM. These types can be reset to a particular pc (where npc = pc + sizeof(MachInst), nnpc = npc + sizeof(MachInst), upc = 0, nupc = 1 as appropriate), printed, serialized, and compared. There is a branching() function which encapsulates code in the CPU models that checked if an instruction branched or not. Exactly what that means in the context of branch delay slots which can skip an instruction when not taken is ambiguous, and ideally this function and its uses can be eliminated. PCStates also generally know how to advance themselves in various ways depending on if they point at an instruction, a microop, or the last microop of a macroop. More on that later. Ideally, accessing all the PCs at once when setting them will improve performance of M5 even though more data needs to be moved around. This is because often all the PCs need to be manipulated together, and by getting them all at once you avoid multiple function calls. Also, the PCs of a particular thread will have spatial locality in the cache. Previously they were grouped by element in arrays which spread out accesses. Advancing the PC: The PCs were previously managed entirely by the CPU which had to know about PC semantics, try to figure out which dimension to increment the PC in, what to set NPC/NNPC, etc. These decisions are best left to the ISA in conjunction with the PC type itself. Because most of the information about how to increment the PC (mainly what type of instruction it refers to) is contained in the instruction object, a new advancePC virtual function was added to the StaticInst class. Subclasses provide an implementation that moves around the right element of the PC with a minimal amount of decision making. In ISAs like Alpha, the instructions always simply assign NPC to PC without having to worry about micropcs, nnpcs, etc. The added cost of a virtual function call should be outweighed by not having to figure out as much about what to do with the PCs and mucking around with the extra elements. One drawback of making the StaticInsts advance the PC is that you have to actually have one to advance the PC. This would, superficially, seem to require decoding an instruction before fetch could advance. This is, as far as I can tell, realistic. fetch would advance through memory addresses, not PCs, perhaps predicting new memory addresses using existing ones. More sophisticated decisions about control flow would be made later on, after the instruction was decoded, and handed back to fetch. If branching needs to happen, some amount of decoding needs to happen to see that it's a branch, what the target is, etc. This could get a little more complicated if that gets done by the predecoder, but I'm choosing to ignore that for now. Variable length instructions: To handle variable length instructions in x86 and ARM, the predecoder now takes in the current PC by reference to the getExtMachInst function. It can modify the PC however it needs to (by setting NPC to be the PC + instruction length, for instance). This could be improved since the CPU doesn't know if the PC was modified and always has to write it back. ISA parser: To support the new API, all PC related operand types were removed from the parser and replaced with a PCState type. There are two warts on this implementation. First, as with all the other operand types, the PCState still has to have a valid operand type even though it doesn't use it. Second, using syntax like PCS.npc(target) doesn't work for two reasons, this looks like the syntax for operand type overriding, and the parser can't figure out if you're reading or writing. Instructions that use the PCS operand (which I've consistently called it) need to first read it into a local variable, manipulate it, and then write it back out. Return address stack: The return address stack needed a little extra help because, in the presence of branch delay slots, it has to merge together elements of the return PC and the call PC. To handle that, a buildRetPC utility function was added. There are basically only two versions in all the ISAs, but it didn't seem short enough to put into the generic ISA directory. Also, the branch predictor code in O3 and InOrder were adjusted so that they always store the PC of the actual call instruction in the RAS, not the next PC. If the call instruction is a microop, the next PC refers to the next microop in the same macroop which is probably not desirable. The buildRetPC function advances the PC intelligently to the next macroop (in an ISA specific way) so that that case works. Change in stats: There were no change in stats except in MIPS and SPARC in the O3 model. MIPS runs in about 9% fewer ticks. SPARC runs with 30%-50% fewer ticks, which could likely be improved further by setting call/return instruction flags and taking advantage of the RAS. TODO: Add != operators to the PCState classes, defined trivially to be !(a==b). Smooth out places where PCs are split apart, passed around, and put back together later. I think this might happen in SPARC's fault code. Add ISA specific constructors that allow setting PC elements without calling a bunch of accessors. Try to eliminate the need for the branching() function. Factor out Alpha's PAL mode pc bit into a separate flag field, and eliminate places where it's blindly masked out or tested in the PC.