gem5 - gem5

Age	Commit message (Expand)	Author
2014-01-24	arm: Add support for ARMv8 (AArch64 & AArch32)	ARM gem5 Developers
2013-09-04	arch: Resurrect the NOISA build target and rename it NULL	Andreas Hansson
2013-09-04	alpha: Move system virtProxy to Alpha only	Andreas Hansson
2013-07-18	mem: Set the cache line size on a system level	Andreas Hansson
2013-02-15	sim: Add a system-global option to bypass caches	Andreas Sandberg
2012-11-02	sim: Move the draining interface into a separate base class	Andreas Sandberg
2012-10-15	Port: Add protocol-agnostic ports in the port hierarchy	Andreas Hansson
2012-10-15	Mem: Separate the host and guest views of memory backing store	Andreas Hansson
2012-10-15	Checkpoint: Make system serialize call children	Andreas Hansson
2012-09-07	sim: add validation to make sure there is memory where we're loading the kernel	Krishnendra Nathella
2012-08-27	System: Remove redundant call to startupCPU	Nilay Vaish
2012-08-08	System: set kernel to null, if unspecified.	Nilay Vaish
2012-08-06	str: add an overloaded startswith() utility method	Steve Reinhardt
2012-06-05	Mem: add per-master stats to physmem	Dam Sunwoo
2012-05-14	Mem: Fix size check when allocating physical memory	Lena Olson
2012-05-10	stats: track if the stats have been enabled and prevent requesting master id	Ali Saidi
2012-04-06	MEM: Enable multiple distributed generalized memories	Andreas Hansson
2012-03-30	MEM: Introduce the master/slave port sub-classes in C++	William Wang
2012-03-09	System: Move code in initState() back into constructor whenever possible.	Ali Saidi
2012-02-24	MEM: Make port proxies use references rather than pointers	Andreas Hansson
2012-02-12	mem: Add a master ID to each request object.	Ali Saidi
2012-02-10	sim/system: initialize the pagePtr variable	Nilay Vaish
2012-02-03	System: Forgot to qrefresh with my last change.	Gabe Black
2012-02-02	System: Fix the check which detects running out of physical memory.	Gabe Black
2012-01-29	Implement Ali's review feedback.	Gabe Black
2012-01-28	Merge with the main repo.	Gabe Black
2012-01-16	Merge yet again with the main repository.	Gabe Black
2012-01-17	MEM: Add port proxies instead of non-structural ports	Andreas Hansson
2012-01-17	MEM: Add the system port as a central access point	Andreas Hansson
2012-01-09	sim: Enable sampling of run-time for code-sections marked using pseudo insts.	Prakash Ramrakhyani
2012-01-07	Merge with main repository.	Gabe Black
2011-10-30	SE/FS: Make the system object more consistent between SE and FS.	Gabe Black
2011-10-22	SE: move page allocation from PageTable to Process	Steve Reinhardt
2011-10-16	SE/FS: Make some system funcs available in SE and FS.	Gabe Black
2011-07-10	O3: Make sure fetch doesn't go off into the weeds during speculation.	Ali Saidi
2011-04-15	trace: reimplement the DTRACE function so it doesn't use a vector	Nathan Binkert
2011-04-15	includes: sort all includes	Nathan Binkert
2011-02-06	m5: added work completed monitoring support	Brad Beckmann
2011-02-06	mcpat: Adds McPAT performance counters	Joel Hestness
2010-11-19	SE: Fix simulating more than 4GB of RAM in SE mode	Ali Saidi
2010-11-08	ARM: Add checkpointing support	Ali Saidi
2010-11-08	sim: Use forward declarations for ports.	Ali Saidi
2010-08-23	Loader: Make the load address mask be a parameter of the system rather than a...	Ali Saidi
2010-06-03	Minor remote GDB cleanup.	Steve Reinhardt
2009-09-23	arch: nuke arch/isa_specific.hh and move stuff to generated config/the_isa.hh	Nathan Binkert
2009-04-15	Get rid of the Unallocated thread context state.	Steve Reinhardt
2009-01-30	Errors: Use the correct panic/warn/fatal/info message in some places.	Ali Saidi
2009-01-17	Fix issue 326: glibc non-deterministic because it reads /proc	Ali Saidi
2008-11-05	Right now a single thread cpu 1 could get assigned context Id != 1, depending	Lisa Hsu
2008-11-02	Add in Context IDs to the simulator. From now on, cpuId is almost never used,	Lisa Hsu