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path: root/src/sim/tlb.hh
AgeCommit message (Expand)Author
2014-09-19arch: Pass faults by const reference where possibleAndreas Hansson
2014-05-09arch, arm: Preserve TLB bootUncacheability when switching CPUsGeoffrey Blake
2013-06-03arch: Create a method to finalize physical addressesAndreas Sandberg
2013-01-07arch: Add support for invalidating TLBs when drainingAndreas Sandberg
2012-10-15Port: Add protocol-agnostic ports in the port hierarchyAndreas Hansson
2012-09-25ARM: Squash outstanding walks when instructions are squashed.Ali Saidi
2012-03-30MEM: Introduce the master/slave port sub-classes in C++William Wang
2011-02-11O3: Enhance data address translation by supporting hardware page table walkers.Giacomo Gabrielli
2011-02-03Fault: Rename sim/fault.hh to fault_fwd.hh to distinguish it from faults.hh.Gabe Black
2010-12-07ARM: Support switchover with hardware table walkersAli Saidi
2010-09-13Faults: Pass the StaticInst involved, if any, to a Fault's invoke method.Gabe Black
2009-04-08tlb: More fixing of unified TLBNathan Binkert
2009-04-08tlb: Don't separate the TLB classes into an instruction TLB and a data TLBGabe Black
2009-02-25CPU: Implement translateTiming which defers to translateAtomic, and convert t...Gabe Black
2009-02-25ISA: Replace the translate functions in the TLBs with translateAtomic.Gabe Black
2008-02-26TLB: Make a TLB base class and put a virtual demapPage function in it.Gabe Black
2007-08-30params: Deprecate old-style constructors; update most SimObject constructors.Miles Kaufmann
2007-08-28Address translation: De-templatize the GenericTLB class.Gabe Black
2007-08-27Address Translation: Make the Generic TLB only compile in SE mode.Gabe Black
2007-08-26Address translation: Make the page table more flexible.Gabe Black
2007-08-26Address Translation: Make SE mode use an actual TLB/MMU for translation like FS.Gabe Black