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2016-11-30arch: [Patch 1/5] Added RISC-V base instruction set RV64IAlec Roelke
First of five patches adding RISC-V to GEM5. This patch introduces the base 64-bit ISA (RV64I) in src/arch/riscv for use with syscall emulation. The multiply, floating point, and atomic memory instructions will be added in additional patches, as well as support for more detailed CPU models. The loader is also modified to be able to parse RISC-V ELF files, and a "Hello world\!" example for RISC-V is added to test-progs. Patch 2 will implement the multiply extension, RV64M; patch 3 will implement the floating point (single- and double-precision) extensions, RV64FD; patch 4 will implement the atomic memory instructions, RV64A, and patch 5 will add support for timing, minor, and detailed CPU models that is missing from the first four patches (such as handling locked memory). [Removed several unused parameters and imports from RiscvInterrupts.py, RiscvISA.py, and RiscvSystem.py.] [Fixed copyright information in RISC-V files copied from elsewhere that had ARM licenses attached.] [Reorganized instruction definitions in decoder.isa so that they are sorted by opcode in preparation for the addition of ISA extensions M, A, F, D.] [Fixed formatting of several files, removed some variables and instructions that were missed when moving them to other patches, fixed RISC-V Foundation copyright attribution, and fixed history of files copied from other architectures using hg copy.] [Fixed indentation of switch cases in isa.cc.] [Reorganized syscall descriptions in linux/process.cc to remove large number of repeated unimplemented system calls and added implmementations to functions that have received them since it process.cc was first created.] [Fixed spacing for some copyright attributions.] [Replaced the rest of the file copies using hg copy.] [Fixed style check errors and corrected unaligned memory accesses.] [Fix some minor formatting mistakes.] Signed-off by: Alec Roelke Signed-off by: Jason Lowe-Power <jason@lowepower.com>
2016-11-17alpha: Remove ALPHA tru64 support and associated testsAndreas Hansson
No one appears to be using it, and it is causing build issues and increases the development and maintenance effort.
2016-10-26dev: Add m5 op to toggle synchronization for dist-gem5.Michael LeBeane
This patch adds the ability for an application to request dist-gem5 to begin/ end synchronization using an m5 op. When toggling on sync, all nodes agree on the next sync point based on the maximum of all nodes' ticks. CPUs are suspended until the sync point to avoid sending network messages until sync has been enabled. Toggling off sync acts like a global execution barrier, where all CPUs are disabled until every node reaches the toggle off point. This avoids tricky situations such as one node hitting a toggle off followed by a toggle on before the other nodes hit the first toggle off.
2016-10-15syscall: read() should not write anything if reading EOF.Nicolas Derumigny
Read() should not write anything when returning 0 (EOF). This patch does not correct the same bug occuring for : nbr_read=read(file, buf, nbytes) When nbr_read<nbytes, nbytes bytes are copied into the virtual RAM instead of nbr_read. If buf is smaller than nbytes, a page fault occurs, even if buf is in fact bigger than nbr_read. Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
2016-10-04sim: Add a checkpoint function to test for entriesAndreas Sandberg
When loading a checkpoint, it's sometimes desirable to be able to test whether an entry within a secion exists. This is currently done automatically in the UNSERIALIZE_OPT_SCALAR macro, but it isn't possible to do for arrays, containers, or enums. Instead of adding even more macros, add a helper function (CheckpointIn::entryExists()) that tests for the presence of an entry. Change-Id: I4b4646b03276b889fd3916efefff3bd552317dbc Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
2016-09-13sim: Refactor quiesce and remove FS assertsMichael LeBeane
The quiesce family of magic ops can be simplified by the inclusion of quiesceTick() and quiesce() functions on ThreadContext. This patch also gets rid of the FS guards, since suspending a CPU is also a valid operation for SE mode.
2016-09-13sim, syscall_emul: Add mmap to EmulatedDriverMichael LeBeane
Add support for calling mmap on an EmulatedDriver file descriptor.
2016-08-05sim: fix issues with pwrite(); don't enable fstatfsTony Gutierrez
this patch fixes issues with changeset 11593 use the host's pwrite() syscall for pwrite64Func(), as opposed to pwrite64(), because pwrite64() does not work well on all distros. undo the enabling of fstatfs, as we will add this in a separate pate.
2016-08-04x86, sim: add some syscalls to X86Tony Gutierrez
this patch adds an implementation for the pwrite64 syscall and enables it for x86_64, and enables fstatfs for x86_64.
2016-07-21cpu: Add SMT support to MinorCPUMitch Hayenga
This patch adds SMT support to the MinorCPU. Currently RoundRobin or Random thread scheduling are supported. Change-Id: I91faf39ff881af5918cca05051829fc6261f20e3
2016-06-28scons: Track swig packages when loading embedded swig codeAndreas Hansson
This patch changes how the embedded swig code is loaded to ensure that gem5 works with swig 3.0.9. For Python 2.7 and above, swig 3.0.9 now relies on importlib, and actually looks in the appropriate packages, even for the wrapped C code. However, the swig wrapper does not explicitly place the module in the right package (it just calls Py_InitModule), and we have to take explicit action to ensure that the swig code can be loaded. This patch adds the information to the generated wrappers and the appropriate calls to set the context as part of the swig initialisation. Previous versions of swig used to fall back on looking in the global namespace for the wrappers (and still do for Python 2.6), but technically things should not work without the functionality in this patch.
2016-06-20sim: Added library include to fix build errors on clang-703.0.31Reiley Jeapaul
The use of array tuples, requires an explicit include of the array library Change-Id: I06730051777a97edf80e41a5604184b387b12239 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
2016-06-07sim: Make clang happyAndreas Hansson
Once again appeasing clang.
2016-06-07sim: added missing include to mathexpr.hhSergei Trofimov
mathexpr.hh uses std::function<> but was not including the appropriate header, which resulted in an error build/ARM/sim/mathexpr.hh:51:18: error: 'function' in namespace 'std' does not name a template type typedef std::function<double(std::string)> EvalCallback; This commit adds the missing include. Change-Id: I6c01d77d4354c6de838538f137a38f75f9866166 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
2016-06-06sim: Only print the power state transition warning onceAndreas Sandberg
A lot of objects seem to request no-op power transitions which currently results in large amounts of warnings. These warnings are benign and risk hiding more serious warnings. Make the warning a warn_once to prevent console flooding. Change-Id: I86c74b4224b167f14469250ef86ab69fde7a227e Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
2016-06-06pwr: Closing power and thermal feedback loopDavid Guillen Fandos
This patch makes thermal models use the power figures calculated by power models. Since there is a circular dependency between power and thermal (and thermal was pushed before) this patch closes that loop. Change-Id: I8bd5acf6a5026fdbbcfac47e33d27397f24a6f7d Reviewed-by: Stephan Diestelhorst <stephan.diestelhorst@arm.com>
2016-06-06sim: Adding support for power modelsDavid Guillen Fandos
This patch adds some basic support for power models in gem5. The power interface is defined so it can interact with thermal models as well. It implements a simple power evaluator that can be used for simple power models that express power in the form of a math expression. These expressions can use stats within the same SimObject (or down its hierarchy) and some magic variables such as "temp" for temperature. In future patches we will extend this functionality to allow slightly more complex expressions. The model allows it to be extended to use other kinds of models. Change-Id: I76752f9638b6815e229fd74cdcb7721a305cbc4b
2016-06-06stats: Silence unused power statsAndreas Sandberg
The power stats are currently very noisy even if no power model has been loaded. Silence stats that are either zero or nan. Change-Id: I7d0220c2fcf01131084a219228f140cfaddaf95b Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
2016-06-06pwr: Add power states to ClockedObjectDavid Guillen Fandos
Add 4 power states to the ClockedObject, provides necessary access functions to check and update the power state. Default power state is UNDEFINED, it is responsibility of the respective simulation model to provide the startup state and any other logic for state change. Add number of transition stat. Add distribution of time spent in clock gated state. Add power state residency stat. Add dump call back function to allow stats update of distribution and residency stats. Change-Id: Id086090a2ed720c9fcb37812a3c98f0f724907c6
2016-06-06stats: Fixing regStats function for some SimObjectsDavid Guillen Fandos
Fixing an issue with regStats not calling the parent class method for most SimObjects in Gem5. This causes issues if one adds new stats in the base class (since they are never initialized properly!). Change-Id: Iebc5aa66f58816ef4295dc8e48a357558d76a77c Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
2016-06-06sim: Call regStats of base-class as wellStephan Diestelhorst
We want to extend the stats of objects hierarchically and thus it is necessary to register the statistics of the base-class(es), as well. For now, these are empty, but generic stats will be added there. Patch originally provided by Akash Bagdia at ARM Ltd.
2016-04-12misc: Appease clang...againAndreas Hansson
Once again, clang is having issues with recently committed code. Unfortunately HSAIL_X86 is still broken.
2016-04-07mem: Add Program Counter to MemTraceProbeVictor Garcia
2016-04-07Revert to 74c1e6513bd0 (sim: Thermal support for Linux)Andreas Sandberg
2016-04-06Revert power patch sets with unexpected interactionsAndreas Sandberg
The following patches had unexpected interactions with the current upstream code and have been reverted for now: e07fd01651f3: power: Add support for power models 831c7f2f9e39: power: Low-power idle power state for idle CPUs 4f749e00b667: power: Add power states to ClockedObject Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> --HG-- extra : amend_source : 0b6fb073c6bbc24be533ec431eb51fbf1b269508
2016-04-05power: Add support for power modelsDavid Guillen Fandos
This patch adds some basic support for power models in gem5. The power interface is defined so it can interact with thermal models as well. It implements a simple power evaluator that can be used for simple power models that express power in the form of a math expression. These expressions can use stats within the same SimObject (or down its hierarchy) and some magic variables such as "temp" for temperature. In future patches we will extend this functionality to allow slightly more complex expressions. The model allows it to be extended to use other kinds of models. Finally, the thermal model is updated to use the power usage as input.
2014-11-18power: Add power states to ClockedObjectAkash Bagdia
Add 4 power states to the ClockedObject, provides necessary access functions to check and update the power state. Default power state is UNDEFINED, it is responsibility of the respective simulation model to provide the startup state and any other logic for state change. Add number of transition stat. Add distribution of time spent in clock gated state. Add power state residency stat. Add dump call back function to allow stats update of distribution and residency stats.
2015-05-12sim: Adding thermal model supportDavid Guillen Fandos
This patch adds basic thermal support to gem5. It models energy dissipation through a circuital equivalent, which allows us to use RC networks. This lays down the basic infrastructure to do so, but it does not "work" due to the lack of power models. For now some hardcoded number is used as a PoC. The solver is embedded in the patch.
2015-12-11sim: Add additional debug information when drainingSascha Bischoff
This patch adds some additional information when draining the system which allows the user to debug which SimObject(s) in the system is failing to drain. Only enabled for the builds with tracing enabled and is subject to the Drain debug flag being set at runtime.
2016-04-01sim: Fix clock_domain unserializationSascha Bischoff
This patch addresses an issue with the unserialization of clock domains. Previously, the previous performance level was not restored due to a bug in the code, which detected the post-unserialize update as superfluous. This patch splits the setting of the clock domain into two parts. The original interface of perfLevel is retained, but the actual update takes place in signalPerfLevelUpdate, which is private to the class. The perfLevel method checks that if the new performance level is different to the previous performance level, and will only call signalPerfLevelUpdate if there is a change. Therefore, the performance level is only updated, and voltage domains notified, if there is an actual change. The split functionality allows signalPerfLevelUpdate to be called by startup() to explicitly force an update post unserialization.
2016-03-17base: add symbol support for dynamic librariesBrandon Potter
Libraries are loaded into the process address space using the mmap system call. Conveniently, this happens to be a good time to update the process symbol table with the library's incoming symbols so we handle the table update from within the system call. This works just like an application's normal symbols. The only difference between a dynamic library and a main executable is when the symbol table update occurs. The symbol table update for an executable happens at program load time and is finished before the process ever begins executing. Since dynamic linking happens at runtime, the symbol loading happens after the library is first loaded into the process address space. The library binary is examined at this time for a symbol section and that section is parsed for symbol types with specific bindings (global, local, weak). Subsequently, these symbols are added to the table and are available for use by gem5 for things like trace generation. Checkpointing should work just as it did previously. The address space (and therefore the library) will be recorded and the symbol table will be entirely recorded. (It's not possible to do anything clever like checkpoint a program and then load the program back with different libraries with LD_LIBRARY_PATH, because the library becomes part of the address space after being loaded.)
2016-03-17base: support dynamic loading of Linux ELF objects in SE modeBrandon Potter
2016-03-17syscall_emul: move mmapGrowsDown() to LiveProcessSteve Reinhardt
The mmapGrowsDown() method was a static method on the OperatingSystem class (and derived classes), which worked OK for the templated syscall emulation methods, but made it hard to access elsewhere. This patch moves the method to be a virtual function on the LiveProcess method, where it can be overridden for specific platforms (for now, Alpha). This patch also changes the value of mmapGrowsDown() from being false by default and true only on X86Linux32 to being true by default and false only on Alpha, which seems closer to reality (though in reality most people use ASLR and this doesn't really matter anymore). In the process, also got rid of the unused mmap_start field on LiveProcess and OperatingSystem mmapGrowsUp variable.
2016-03-17syscall_emul: fix bugs for mmap2 system call and x86-32 syscallsBrandon Potter
2016-03-17syscall_emul: extend mmap system call to support file backed mmapsBrandon Potter
For O3, which has a stat that counts reg reads, there is an additional reg read per mmap() call since there's an arg we no longer ignore. Otherwise, stats should not be affected.
2016-03-17syscall_emul: add extra debug support for syscallsAlexandru Dutu
Breaks the debug output from system calls into two levels: Base and Verbose. A macro is added specifically for system calls which allows developers to easily add new debug messages in a consistent manner. The macro also contains a field to print thread IDs along with the CPU ID.
2016-03-17syscall_emul, style: refactor lseekBrandon Potter
2016-03-17syscall_emul, style: fix newline issue inside assertBrandon Potter
2016-03-08syscall_emul: Fix erroneous use of deleteAndreas Hansson
clang correctly points out an erroneous use of delete.
2015-06-17sim: Add voltage() function to clocked_objectDavid Guillen Fandos
Adding voltage function which returns the current voltage for a given clocked object. It's handy for power models and similar stuff that need to retrieve voltage. Function frequency() is already there, so I see no reason for not having this one too.
2015-11-26sim: Add support for notifying Drainable objects of a forkAndreas Sandberg
When forking a gem5 process, some objects need to clean up resources (mainly file descriptions) shared between the child and the parent of the fork. This changeset adds the notifyFork() method to Drainable, which is called in the child process. Signed-off-by: Andreas Sandberg <andreas@sandberg.pp.se> [sascha.bischoff@arm.com: Rebased patches onto a newer gem5 version] Signed-off-by: Sascha Bischoff <sascha.bischoff@arm.com> Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
2015-11-27base: Add support for changing output directoriesAndreas Sandberg
This changeset adds support for changing the simulator output directory. This can be useful when the simulation goes through several stages (e.g., a warming phase, a simulation phase, and a verification phase) since it allows the output from each stage to be located in a different directory. Relocation is done by calling core.setOutputDir() from Python or simout.setOutputDirectory() from C++. This change affects several parts of the design of the gem5's output subsystem. First, files returned by an OutputDirectory instance (e.g., simout) are of the type OutputStream instead of a std::ostream. This allows us to do some more book keeping and control re-opening of files when the output directory is changed. Second, new subdirectories are OutputDirectory instances, which should be used to create files in that sub-directory. Signed-off-by: Andreas Sandberg <andreas@sandberg.pp.se> [sascha.bischoff@arm.com: Rebased patches onto a newer gem5 version] Signed-off-by: Sascha Bischoff <sascha.bischoff@arm.com> Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
2016-02-13syscall_emul: Implement clock_getres() system callMichael LeBeane
This patch implements the clock_getres() system call for arm and x86 in linux SE mode.
2016-02-06style: fix missing spaces in control statementsSteve Reinhardt
Result of running 'hg m5style --skip-all --fix-control -a'.
2016-02-06style: remove trailing whitespaceSteve Reinhardt
Result of running 'hg m5style --skip-all --fix-white -a'.
2016-01-17sim: don't ignore SIG_TRAPSteve Reinhardt
By ignoring SIG_TRAP, using --debug-break <N> when not connected to a debugger becomes a no-op. Apparently this was intended to be a feature, though the rationale is not clear. If we don't ignore SIG_TRAP, then using --debug-break <N> when not connected to a debugger causes the simulation process to terminate at tick N. This is occasionally useful, e.g., if you just want to collect a trace for a specific window of execution then you can combine this with --debug-start to do exactly that. In addition to not ignoring the signal, this patch also updates the --debug-break help message and deletes a handful of unprotected calls to Debug::breakpoint() that relied on the prior behavior.
2016-01-11scons: Enable -Wextra by defaultAndreas Hansson
Make best use of the compiler, and enable -Wextra as well as -Wall. There are a few issues that had to be resolved, but they are all trivial.
2016-01-07dev: Distributed Ethernet link for distributed gem5 simulationsGabor Dozsa
Distributed gem5 (abbreviated dist-gem5) is the result of the convergence effort between multi-gem5 and pd-gem5 (from Univ. of Wisconsin). It relies on the base multi-gem5 infrastructure for packet forwarding, synchronisation and checkpointing but combines those with the elaborated network switch model from pd-gem5. --HG-- rename : src/dev/net/multi_etherlink.cc => src/dev/net/dist_etherlink.cc rename : src/dev/net/multi_etherlink.hh => src/dev/net/dist_etherlink.hh rename : src/dev/net/multi_iface.cc => src/dev/net/dist_iface.cc rename : src/dev/net/multi_iface.hh => src/dev/net/dist_iface.hh rename : src/dev/net/multi_packet.hh => src/dev/net/dist_packet.hh
2016-01-07pseudo inst,util: Add optional key to initparam pseudo instructionGabor Dozsa
The key parameter can be used to read out various config parameters from within the simulated software.
2015-12-18sim: Use the old work item behavior by defaultAndreas Sandberg
When adding an option to forward work items to the Python environment, the new behavior was accidentally enabled by default. Set the value of exit_on_work_items to False by default to revert to the old behavior unless the simulation scripts explicitly requests work item forwarding.