summaryrefslogtreecommitdiff
path: root/src/sim
AgeCommit message (Collapse)Author
2009-05-04scons: re-work the *Source functions to take more information.Nathan Binkert
Start by turning all of the *Source functions into classes so we can do more calculations and more easily collect the data we need. Add parameters to the new classes for indicating what sorts of flags the objects should be compiled with so we can allow certain files to be compiled without Werror for example.
2009-04-24SPARC: Tighten up the clone system call and SPARCs copyRegs.Gabe Black
2009-04-21pseudo: only include kernel stats if FULL_SYSTEM.Nathan Binkert
2009-04-21syscall_emul: style fixes (mostly wrapping overly long lines)Steve Reinhardt
2009-04-21syscall: Resolve conflicts between m5threads and Gabe's recent SE changes.Steve Reinhardt
2009-04-21Commit m5threads package.Daniel Sanchez
This patch adds limited multithreading support in syscall-emulation mode, by using the clone system call. The clone system call works for Alpha, SPARC and x86, and multithreaded applications run correctly in Alpha and SPARC.
2009-04-15Get rid of the Unallocated thread context state.Steve Reinhardt
Basically merge it in with Halted. Also had to get rid of a few other functions that called ThreadContext::deallocate(), including: - InOrderCPU's setThreadRescheduleCondition. - ThreadContext::exit(). This function was there to avoid terminating simulation when one thread out of a multi-thread workload exits, but we need to find a better (non-cpu-centric) way.
2009-04-08tlb: More fixing of unified TLBNathan Binkert
2009-04-08tlb: Don't separate the TLB classes into an instruction TLB and a data TLBGabe Black
2009-03-05stats: Fix all stats usages to deal with template fixesNathan Binkert
2009-03-05serialize: Allow floats and doubles to be serializedNathan Binkert
2009-02-27Processes: Make getting and setting system call arguments part of a process ↵Gabe Black
object.
2009-02-27X86: Add a class to support 32 bit x86 linux process.Gabe Black
2009-02-26CPA: Add new object for gathering critical path annotations.Ali Saidi
2009-02-25CPU: Implement translateTiming which defers to translateAtomic, and convert ↵Gabe Black
the timing simple CPU to use it.
2009-02-25ISA: Replace the translate functions in the TLBs with translateAtomic.Gabe Black
2009-02-23stats: cleanup static stats to make startup work.Nathan Binkert
This is mainly to allow the unit test to run without requiring the standard M5 stats from being initialized (e.g. sim_seconds, sim_ticks, host_seconds)
2009-02-23debug: Move debug_break into src/baseNathan Binkert
2009-02-16sycalls: implement mremap() and add DATA flag for getrlimit(). mremap has ↵Lisa Hsu
been tested on Alpha, compiles for the rest but not tested. I don't see why it wouldn't work though.
2009-02-15X86: Make the loader recognize 32 bit x86 processes.Gabe Black
2009-01-30Errors: Use the correct panic/warn/fatal/info message in some places.Ali Saidi
2009-01-29Fix typoNathan Binkert
2009-01-24pseudo inst: Add new wake cpu instruction for sending a message to wake a cpu.Nathan Binkert
It's instantaneous and so it's somewhat bogus, but it's a first step.
2009-01-19python: Rework how things are importedNathan Binkert
2009-01-17Fix issue 326: glibc non-deterministic because it reads /procAli Saidi
2009-01-06Tracing: Make tracing aware of macro and micro ops.Gabe Black
2008-12-17Make Alpha pseudo-insts available from SE mode.Steve Reinhardt
2008-12-08eventq: Add some debugging code to the eventq.Nathan Binkert
2008-12-07imported patch aux-fix.patchLisa Hsu
2008-12-06eventq: use the flags data structureNathan Binkert
2008-12-06eventq: move virtual function definitiions to the .cc file.Nathan Binkert
2008-12-05This brings M5 closer to modernity - the kernel being advertised is newer so ↵Lisa Hsu
it won't die on binaries compiled with newer glibc's, and enables use of TLS-toolchain built binaries for ALPHA_SE by putting auxiliary vectors on the stack. There are some comments in the code to help. Finally, stats changes for ALPHA are from slight perturbations to the initial stack frame, all minimal diffs.
2008-12-04This patch pulls out the auxiliary vector struct from individual ISALisa Hsu
LiveProcesses to the base LiveProcess definition so anyone can use them.
2008-11-20Assume files w/o obvious OS are Linux (with warning)Steve Reinhardt
instead of giving a fatal error.
2008-11-15syscalls: fix latent brk/obreak bug.Steve Reinhardt
Bogus calls to ChunkGenerator with negative size were triggering a new assertion that was added there. Also did a little renaming and cleanup in the process.
2008-11-10pseudo inst: Add rpns (read processor nanoseconds) instruction.Nathan Binkert
This instruction basically returns the number of nanoseconds that the CPU has been running.
2008-11-10clean: Move some stuff from the hh file to the cc file.Nathan Binkert
2008-11-10python: Fix the reference counting for python events placed on the eventq.Nathan Binkert
We need to add a reference when an object is put on the C++ queue, and remove a reference when the object is removed from the queue. This was not happening before and caused a memory problem.
2008-11-05Right now a single thread cpu 1 could get assigned context Id != 1, dependingLisa Hsu
on the order in which it's registered with the system. To make them match, here is a little change.
2008-11-02Add in Context IDs to the simulator. From now on, cpuId is almost never used,Lisa Hsu
the primary identifier for a hardware context should be contextId(). The concept of threads within a CPU remains, in the form of threadId() because sometimes you need to know which context within a cpu to manipulate.
2008-11-02Make it so that all thread contexts are registered with the System, even inLisa Hsu
SE. Process still keeps track of the tc's it owns, but registration occurs with the System, this eases the way for system-wide context Ids based on registration.
2008-11-02make BaseCPU the provider of _cpuId, and cpuId() instead of being scatteredLisa Hsu
across the subclasses. generally make it so that member data is _cpuId and accessor functions are cpuId(). The ID val comes from the python (default -1 if none provided), and if it is -1, the index of cpuList will be given. this has passed util/regress quick and se.py -n4 and fs.py -n4 as well as standard switch.
2008-10-14eventq: revert code for unserializing events.Nathan Binkert
Since I never implemented a proper solution, put it back to something that at least works for now. Once I add more event queues, I'll have to really fix this though
2008-10-12CPU: Create a microcode ROM object in the CPU which is defined by the ISA.Gabe Black
2008-10-10TLB: Make all tlbs derive from a common base class in both python and C++.Gabe Black
2008-10-10Rename the info function to inform to avoid likely name conflictsNathan Binkert
2008-10-10output: Make panic/fatal/warn more flexible so we can add some new ones.Nathan Binkert
The major thrust of this change is to limit the amount of code duplication surrounding the code for these functions. This code also adds two new message types called info and hack. Info is meant to be less harsh than warn so people don't get confused and start thinking that the simulator is broken. Hack is a way for people to add runtime messages indicating that the simulator just executed a code "hack" that should probably be fixed. The benefit of knowing about these code hacks is that it will let people know what sorts of inaccuracies or potential bugs might be entering their experiments. Finally, I've added some flags to turn on and off these message types so command line options can change them.
2008-10-10gdb: add a debugging function that enters the python interpreter.Nathan Binkert
2008-10-09SimObjects: Clean up handling of C++ namespaces.Nathan Binkert
Make them easier to express by only having the cxx_type parameter which has the full namespace name, and drop the cxx_namespace thing. Add support for multiple levels of namespace.
2008-10-09eventq: convert all usage of events to use the new API.Nathan Binkert
For now, there is still a single global event queue, but this is necessary for making the steps towards a parallelized m5.