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path: root/src/sim
AgeCommit message (Expand)Author
2013-02-19scons: Fix up numerous warnings about name shadowingAndreas Hansson
2013-02-19sim: Make clock private and access using clockPeriod()Andreas Hansson
2013-02-15sim: Add a system-global option to bypass cachesAndreas Sandberg
2013-01-31sim: remove unused struct priority_compareNilay Vaish
2013-01-08util: add m5_fail op.LluĂ­s Vilanova
2013-01-08sim: Fix early termination in multi-core simulation under SE mode.Tao Zhang
2013-01-08arm: add access syscall for ARM SE modeMitch Hayenga
2013-01-07stats: Fix swig wrapping for Tick in statsSascha Bischoff
2013-01-07sim: Remove unused variablesAndreas Sandberg
2013-01-07arm: Remove the register mapping hack used when copying TCsAndreas Sandberg
2013-01-07arch: Move the ISA object to a separate sectionAndreas Sandberg
2013-01-07arch: Add support for invalidating TLBs when drainingAndreas Sandberg
2013-01-07sim: Fatal if a clocked object is set to have a clock of 0Andreas Hansson
2013-01-07config: Do not use hardcoded physmem in fs scriptAndreas Hansson
2013-01-07base: Add wrapped protobuf output streamsAndreas Hansson
2013-01-04SPARC: Keep a copy of the current ASI in the decoder.Gabe Black
2012-11-16sim: have a curTick per eventqNilay Vaish
2012-11-02sim: Add drain methods to request additional cleanup operationsAndreas Sandberg
2012-11-02sim: Move the draining interface into a separate base classAndreas Sandberg
2012-11-02sim: Include object header files in SWIG interfacesAndreas Sandberg
2012-11-02ARM: dump stats and process info on context switchesDam Sunwoo
2012-11-02sim: Fix as issue where exit events on instr queues are used after freed.Ali Saidi
2012-10-25dev: Make default clock more reasonable for system and devicesAndreas Hansson
2012-10-15ruby: reset timing after cache warm upNilay Vaish
2012-10-15Port: Add protocol-agnostic ports in the port hierarchyAndreas Hansson
2012-10-15Mem: Separate the host and guest views of memory backing storeAndreas Hansson
2012-10-15Checkpoint: Make system serialize call childrenAndreas Hansson
2012-10-15Clock: Inherit the clock from parent by defaultAndreas Hansson
2012-09-25Statistics: Add a function to configure periodic stats dumpingSascha Bischoff
2012-09-25ARM: Squash outstanding walks when instructions are squashed.Ali Saidi
2012-09-25sim: Move CPU-specific methods from SimObject to the BaseCPU classAndreas Sandberg
2012-09-25sim: Remove SimObject::setMemoryModeAndreas Sandberg
2012-09-21SE: Ignore FUTEX_PRIVATE_FLAG of sys_futexLluc Alvarez
2012-09-10NetBSD: Build on NetBSDPalle Lyckegaard
2012-09-07sim: Update the SimObject documentationAndreas Sandberg
2012-09-07sim: Remove the unused SimObject::regFormulas methodAndreas Sandberg
2012-09-07sim: add validation to make sure there is memory where we're loading the kernelKrishnendra Nathella
2012-08-28Clock: Add a Cycles wrapper class and use where applicableAndreas Hansson
2012-08-28Clock: Rework clocks to avoid tick-to-cycle transformationsAndreas Hansson
2012-08-27sim: fix overflow check in simulate because Tick is now unsignedAnthony Gutierrez
2012-08-27System: Remove redundant call to startupCPUNilay Vaish
2012-08-21EventManager: Remove test for NULL pointer in constructorAndreas Hansson
2012-08-21Clock: Make Tick unsigned and remove UTickAndreas Hansson
2012-08-21Clock: Move the clock and related functions to ClockedObjectAndreas Hansson
2012-08-15O3,ARM: fix some problems with drain/switchout functionality and add Drain DP...Anthony Gutierrez
2012-08-08System: set kernel to null, if unspecified.Nilay Vaish
2012-08-06process: add progName() virtual functionSteve Reinhardt
2012-08-06syscall_emul: clean up open() code a bit.Steve Reinhardt
2012-08-06str: add an overloaded startswith() utility methodSteve Reinhardt
2012-08-06syscall emulation: Clean up ioctl handling, and implement for x86.Marc Orr