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2011-10-20SimObject: add export_method* hooks to export C++ methods to PythonSteve Reinhardt
Replace the (broken as of previous changeset) swig_objdecl() method that allowed/forced you to substitute a whole new C++ struct definition for SWIG to wrap with a set of export_method* hooks that let you just declare a set of C++ methods (or other declarations) that get inserted in the auto-generated struct. Restore the System get/setMemoryMode methods, and use this mechanism to specialize SimObject as well, eliminating teh need for sim_object.i. Needed bits of sim_object.i are moved to the new pyobject.i. Also sucked a little SimObject specialization into cxx_param_decl() allowing us to get rid of src/sim/sim_object_params.hh. Now the generation and wrapping of the base SimObject param struct is more in line with how derived objects are handled. --HG-- rename : src/python/swig/sim_object.i => src/python/swig/pyobject.i
2011-10-20scons/swig: refactor some of the scons/SWIG codeSteve Reinhardt
- Move the random bits of SWIG code generation out of src/SConscript file and into methods on the objects being wrapped. - Cleaned up some variable naming and added some comments to make the process a little clearer. - Did a little generated file/module renaming: - vptype_Foo now Foo_vector - init_Foo is now Foo_init This makes it easier to see all the Foo-related files in a sorted directory listing. - Made cxx_predecls and swig_predecls normal SimObject classmethods. - Got rid of swig_objdecls hook, even though this breaks the System objects get/setMemoryMode method exports. Will be fixing this in a future changeset.
2011-09-27Faults: Make the generic faults more consistent between SE and FS.Gabe Black
All of the classes will now be available in both modes, and only GenericPageTableFault will continue to check the mode for conditional compilation. It uses a process object to handle the fault in SE mode, and for now those aren't available in FS mode.
2011-09-26SE/FS: Define a const bool FullSystem which will equal FULL_SYSTEM.Gabe Black
This constant will have the same value as FULL_SYSTEM but will not be usable by the preprocessor. It can be substituted into places where FULL_SYSTEM is used in a C++ context and will make it easier to find which parts of the simulator still use FULL_SYSTEM with the preprocessor using grep.
2011-09-22event: minor cleanupSteve Reinhardt
Initialize flags via the Event constructor instead of calling setFlags() in the body of the derived class's constructor. I forget exactly why, but this made life easier when implementing multi-queue support. Also rename Event::getFlags() to isFlagSet() to better match common usage, and get rid of some unused Event methods.
2011-09-22pseudo_inst: clean up workbegin/workend functionsSteve Reinhardt
Use exitSimLoop() function instead of explicitly scheduling on mainEventQueue (which won't work once we go to multiple event queues). Also introduced a local params variable to shorten a lot of expressions.
2011-09-19Faults: Get rid of the unused isAlignmentFault and isMachineCheckFault.Gabe Black
These functions aren't called anywhere and are probably only theoretically useful.
2011-09-19Endianness: Make it easier to check the compiled in guest endianness.Gabe Black
It was technically possible but clumsy to determine what endianness a guest was configured with using the state in byteswap.hh. This change makes that information available more directly. Also get rid of unused (and mildly redundant) ByteOrderDiffers constant.
2011-09-19PseudoInst: Make all the pseudo insts available in SE and FS.Gabe Black
2011-09-18Pseudoinst: Add an initParam pseudo inst function.Gabe Black
2011-09-13LSQ: Only trigger a memory violation with a load/load if the value changes.Ali Saidi
Only create a memory ordering violation when the value could have changed between two subsequent loads, instead of just when loads go out-of-order to the same address. While not very common in the case of Alpha, with an architecture with a hardware table walker this can happen reasonably frequently beacuse a translation will miss and start a table walk and before the CPU re-schedules the faulting instruction another one will pass it to the same address (or cache block depending on the dendency checking). This patch has been tested with a couple of self-checking hand crafted programs to stress ordering between two cores. The performance improvement on SPEC benchmarks can be substantial (2-10%).
2011-09-10PseudoInst: Add compiler guards to pseudo_inst.hh.Gabe Black
2011-09-09Stack: Tidy up some comments, a warning, and make stack extension consistent.Gabe Black
Do some minor cleanup of some recently added comments, a warning, and change other instances of stack extension to be like what's now being done for x86.
2011-09-02TLB: comments and a helpful warning.Lisa Hsu
Nothing big here, but when you have an address that is not in the page table request to be allocated, if it falls outside of the maximum stack range all you get is a page fault and you don't know why. Add a little warn() to explain it a bit. Also add some comments and alter logic a little so that you don't totally ignore the return value of checkAndAllocNextPage().
2011-07-10O3: Make sure fetch doesn't go off into the weeds during speculation.Ali Saidi
2011-06-02scons: rename TraceFlags to DebugFlagsNathan Binkert
2011-06-02copyright: clean up copyright blocksNathan Binkert
2011-05-23sim: style fixes in sim/process.hhSteve Reinhardt
2011-05-23syscall emul: fix Power Linux mmap constant, plus other cleanupSteve Reinhardt
We were getting a spurious warning in the regressions that turned out to be due to having the wrong value for TGT_MAP_ANONYMOUS for Power Linux, but in the process of tracking it down I ended up doing some cleanup of the mmap handling in general.
2011-05-23sim: add some DPRINTFs for debugging unserializationSteve Reinhardt
Also got rid of unused C++ unserializeAll() method (this is now handled in Python)
2011-05-04Debug: Add a function to cause the simulator to create a checkpoint from GDB.Ali Saidi
2011-05-04Core: Add some documentation about the sim clocks.Ali Saidi
2011-04-19stats: rename stats so they can be used as python expressionsNathan Binkert
2011-04-15python: cleanup python code so stuff doesn't automatically happen at startupNathan Binkert
this allows things to be overridden at startup (e.g. for tests)
2011-04-15scons: make a flexible system for guarding source filesNathan Binkert
This is similar to guards on mercurial queues and they're used for selecting which files are compiled into some given object. We already do something similar, but it's mostly hard coded for the m5 binary and the m5 library and I'd like to make it more flexible to better support the unittests
2011-04-15trace: reimplement the DTRACE function so it doesn't use a vectorNathan Binkert
At the same time, rename the trace flags to debug flags since they have broader usage than simply tracing. This means that --trace-flags is now --debug-flags and --trace-help is now --debug-help
2011-04-15debug: create a Debug namespaceNathan Binkert
2011-04-15includes: sort all includesNathan Binkert
2011-03-29sim: typecast Tick to UTick for eventQ assertKorey Sewell
2011-03-17ARM: Add minimal ARM_SE support for m5threads.Chris Emmons
Updated some of the assembly code sequences to use armv7 instructions and coprocessor 15 for storing the TLS pointer.
2011-03-17ARM: Allow conditional quiesce instructions.Ali Saidi
This patch prevents not executed conditional instructions marked as IsQuiesce from stalling the pipeline indefinitely. If the instruction is not executed the quiesceSkip psuedoinst is called which schedules a wakes up call to the fetch stage.
2011-02-11Serialization: Allow serialization of stl listsAli Saidi
2011-02-11O3: Enhance data address translation by supporting hardware page table walkers.Giacomo Gabrielli
Some ISAs (like ARM) relies on hardware page table walkers. For those ISAs, when a TLB miss occurs, initiateTranslation() can return with NoFault but with the translation unfinished. Instructions experiencing a delayed translation due to a hardware page table walk are deferred until the translation completes and kept into the IQ. In order to keep track of them, the IQ has been augmented with a queue of the outstanding delayed memory instructions. When their translation completes, instructions are re-executed (only their initiateAccess() was already executed; their DTB translation is now skipped). The IEW stage has been modified to support such a 2-pass execution.
2011-02-11Timesync: Make sure timesync event is setup after curTick is unserializedAli Saidi
Setup initial timesync event in initState or loadState so that curTick has been updated to the new value, otherwise the event is scheduled in the past.
2011-02-06m5: added work completed monitoring supportBrad Beckmann
2011-02-06mcpat: Adds McPAT performance countersJoel Hestness
Updated patches from Rick Strong's set that modify performance counters for McPAT
2011-02-03Fault: Forgot to refresh to grab these header guard updates.Gabe Black
2011-02-03Fault: Rename sim/fault.hh to fault_fwd.hh to distinguish it from faults.hh.Gabe Black
--HG-- rename : src/sim/fault.hh => src/sim/fault_fwd.hh
2011-01-31Fault: Move the definition of NoFault from faults.hh to fault.hh.Gabe Black
Moving the definition of NoFault into fault.hh doesn't bring any new dependencies with it, and allows some files to include just fault.hh which has less baggage. NoFault will still be available to everything that includes faults.hh because it includes fault.hh.
2011-01-20checkpointing: fix bug from curTick accessor conversion.Steve Reinhardt
Regex replacement of curTick with curTick() accidentally changed checkpoint key string for serialization but not for unserialization.
2011-01-19TimeSync: Use the new setTick and getTick functions.Gabe Black
2011-01-19Time: Add a mechanism to prevent M5 from running faster than real time.Gabe Black
M5 skips over any simulated time where it doesn't have any work to do. When the simulation is active, the time skipped is short and the work done at any point in time is relatively substantial. If the time between events is long and/or the work to do at each event is small, it's possible for simulated time to pass faster than real time. When running a benchmark that can be good because it means the simulation will finish sooner in real time. When interacting with the real world through, for instance, a serial terminal or bridge to a real network, this can be a problem. Human or network response time could be greatly exagerated from the perspective of the simulation and make simulated events happen "too soon" from an external perspective. This change adds the capability to force the simulation to run no faster than real time. It does so by scheduling a periodic event that checks to see if its simulated period is shorter than its real period. If it is, it stalls the simulation until they're equal. This is called time syncing. A future change could add pseudo instructions which turn time syncing on and off from within the simulation. That would allow time syncing to be used for the interactive parts of a session but then turned off when running a benchmark using the m5 utility program inside a script. Time syncing would probably not happen anyway while running a benchmark because there would be plenty of work for M5 to do, but the event overhead could be avoided.
2011-01-15time: improve time datastructureNathan Binkert
Use posix clock functions (and librt) if it is available. Inline a bunch of functions and implement more operators. * * * time: more cleanup
2011-01-10Root: Get rid of unnecessary includes in root.cc.Gabe Black
2011-01-07Replace curTick global variable with accessor functions.Steve Reinhardt
This step makes it easy to replace the accessor functions (which still access a global variable) with ones that access per-thread curTick values.
2011-01-07stats: rename StatEvent() function to schedStatEvent().Steve Reinhardt
This follows the style rules and is more descriptive.
2011-01-07sim: clean up CountedDrainEvent slightly.Steve Reinhardt
There's no reason for it to derive from SimLoopExitEvent. This whole drain thing needs to be redone eventually, but this is a stopgap to make later changes to SimLoopExitEvent feasible.
2011-01-07sim: delete unused CheckSwapEvent code.Steve Reinhardt
There's no way to even create one of these anymore.
2011-01-07pseudoinst: get rid of mainEventQueue references.Steve Reinhardt
Avoid direct references to mainEventQueue in pseudo-insts by indirecting through associated CPU object. Made exitSimLoop() more flexible to enable some of these.
2011-01-03Make commenting on close namespace brackets consistent.Steve Reinhardt
Ran all the source files through 'perl -pi' with this script: s|\s*(};?\s*)?/\*\s*(end\s*)?namespace\s*(\S+)\s*\*/(\s*})?|} // namespace $3|; s|\s*};?\s*//\s*(end\s*)?namespace\s*(\S+)\s*|} // namespace $2\n|; s|\s*};?\s*//\s*(\S+)\s*namespace\s*|} // namespace $1\n|; Also did a little manual editing on some of the arch/*/isa_traits.hh files and src/SConscript.