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2017-12-13arm,sparc,x86,base,cpu,sim: Replace the Twin(32|64)_t types with.Gabe Black
Replace them with std::array<>s. Change-Id: I76624c87a1cd9b21c386a96147a18de92b8a8a34 Reviewed-on: https://gem5-review.googlesource.com/6602 Maintainer: Gabe Black <gabeblack@google.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
2017-12-13base: Add endianness conversion functions for std::array types.Gabe Black
These swap the endianness of each element within the array individually. They probably obsolute the Twin(32|64)_t types which I believe were used for SPARC. Change-Id: Ic389eb24bdcdc0081068b0c5a37abdf416f6c924 Reviewed-on: https://gem5-review.googlesource.com/6581 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2017-12-04misc: Rename misc.(hh|cc) to logging.(hh|cc)Gabe Black
These files aren't a collection of miscellaneous stuff, they're the definition of the Logger interface, and a few utility macros for calling into that interface (panic, warn, etc.). Change-Id: I84267ac3f45896a83c0ef027f8f19c5e9a5667d1 Reviewed-on: https://gem5-review.googlesource.com/6226 Reviewed-by: Brandon Potter <Brandon.Potter@amd.com> Maintainer: Gabe Black <gabeblack@google.com>
2017-11-27scons: Switch from "guards" to "tags" on source files.Gabe Black
Tags are just arbitrary strings which are attached to source files which mark them as having some property. By default, all source files have the "gem5 lib" tag added to them which marks them as part of the gem5 library, the primary component of the gem5 binary but also a seperable component for use in, for example, system C. The tags can be completely overridden by setting the "tags" parameter on Source, etc., functions, and can be augmented by setting "add_tags" which are tags that will be added, or alternatively additional tags. It's possible to specify both, in which case the tags will be set to the union of tags and add_tags. add_tags is supposed to be a way to add extra tags to the default without actually overriding the default. Both tags and add_tags can be a list/tuple/etc of tags, or a single string which will be converted into a set internally. Other existing tags include: 1. "python" for files that need or are used with python and are excluded when the --without-python option is set 2. "main" for the file(s) which implement the gem5 binary's main function. 3. The name of a unit test to group its files together. 4. Tags which group source files for partial linking. By grouping the "tags" into a single parameter instead of taking all extra parameters as tags, the extra parameters can, in the future, be passed to the underlying scons environment. Also, the tags are either present or not. With guards, they could be present and True, present and False, or not present at all. Change-Id: I6d0404211a393968df66f7eddfe019897b6573a2 Reviewed-on: https://gem5-review.googlesource.com/5822 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2017-11-22sim-se: Add default to SyscallDesc constructorAlec Roelke
This patch adds a default value of unimplementedFunc to SyscallDesc's constructor's second argument, which makes adding system call placeholders to SE mode cleaner. Change-Id: I3e7efb3a887cc52d16d2095d3dd2e2a96fb882fb Reviewed-on: https://gem5-review.googlesource.com/5501 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Brandon Potter <Brandon.Potter@amd.com>
2017-11-21sim: Fix need to save address space info during serialization.Austin Harris
This fixes a fatal already mapped error in FuncPageTable::allocate that occurs in some cases when restoring from a checkpoint. Change-Id: Ib726a69358118626663e42b7f14889b0d3a98de0 Reported-by: Ruohuang Zheng <zhengruohuang@gmail.com> Signed-off-by: Austin Harris <austinharris@utexas.edu> Reviewed-on: https://gem5-review.googlesource.com/5901 Reviewed-by: Gabe Black <gabeblack@google.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Jason Lowe-Power <jason@lowepower.com>
2017-11-17sim: Implement load_addr_mask auto-calculationGeoffrey Blake
Recent Linux kernels for AArch64 have changed their start addresses but we still want to relocate the kernel to 0x80080000 which required hacking the load_addr_mask in Realview.py to be 0x7ffffff from 0xfffffff to mask off the proper number of MSBs to load the kernel in the desired location. To avoid having to make this change in the future again, we auto-calculate the load_addr_mask if it is specified as 0x0 in the System sim-object to find the most restrictive address mask instead of having the configuration specify it. If the configuration does specify the address mask, we use it instead of auto-calculating. Change-Id: I18aabb5d09945c6e3e3819c9c8036ea24b6c35cf Signed-off-by: Geoffrey Blake <Geoffrey.Blake@arm.com> Reviewed-by: Curtis Dunham <curtis.dunham@arm.com> Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/2323 Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
2017-11-16sim: ScopedMigration does nothing if both eqs are the sameTiago Muck
Added a check to avoid unlocking/locking the same event queue. Also, added an optional parameter to enable the migration to be skipped. This can be useful to disable the synchronization for certain runtime conditions. Change-Id: I4b03b3ffff4f9503153cd41dd8aa78705bf16cc4 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/5730 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Jason Lowe-Power <jason@lowepower.com>
2017-11-16pwr: Enable multiple power models per componentDavid Guillen Fandos
This patch allows the user to specify more than one power model for any given Clocked Object. This is useful and some times necessary to properly model components that have multiple power sources (or subcomponents) but gem5 doesn't model them. The ideal solution would be to have a DictParam to replace the VectorParam so each model can have a name and can be identified in the stats file. Change-Id: I4080a7054a16b56069c44750a7a9ce4e674cdf9d Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/5733 Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2017-11-16sim: Clocked object debug message updated for clarityTiago Muck
Change-Id: I5bbf36ef21ac14d9edf68ec6766d33f88e84d308 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/5729 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Jason Lowe-Power <jason@lowepower.com>
2017-11-16sim: Add an option to load additional kernel objectsAndreas Sandberg
There are cases where it is desirable to load a kernel and a set of additional objects. This can, for example, be useful for testing where the bootstrap code can be loaded from one object (the kernel) and the test proper from another. This changeset adds this functionality by adding a kernel_extras vector parameter to the System class. Object files in this vector are loaded in order after the kernel when running in full system mode. Change-Id: I06f57c6a65a17b02eb4267bed0aa829f21bcfa3b Reviewed-on: https://gem5-review.googlesource.com/5703 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Jason Lowe-Power <jason@lowepower.com>
2017-11-06sim-se: Add prlimit system callAlec Roelke
Some ISAs (namely RISC-V) implement getrlimit and setrlimit using prlimit. This patch adds an implementation for the prlimit system call. Normally prlimit is supposed to provide the functionality of both getrlimit and setrlimit, but because gem5 does not support setrlimit this implementation of prlimit will simply display a warning and return a failure code if the setrlimit mode is used. The same thing will happen if a pid other than 0 is passed to it. Change-Id: I653af2d5a60e716f4d6286196be7600409efcef8 Reviewed-on: https://gem5-review.googlesource.com/5321 Maintainer: Brandon Potter <Brandon.Potter@amd.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
2017-09-28sim-se: Fix mremap for downward growing mmap regionsRico Amslinger
mremapFunc(...) did not respect Process::mmapGrowsDown(). This resulted in an attempt to remap into an already allocated region and a panic in FuncPageTable::allocate(...). This behavior can be observed in 435.gromacs. Change-Id: Ib3ad33816126c76506d69679bdcefa7a98ef69f9 Reviewed-on: https://gem5-review.googlesource.com/4700 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Brandon Potter <Brandon.Potter@amd.com>
2017-09-27sim: make compile on FreeBSD prior to 11Bjoern A. Zeeb
FreeBSD before the early 11 development is expecting a char * for stack.ss_sp rather than the standards compliant void *. Catch that case and allow gem5 to compile on old FreeBSD versions. Change-Id: Ic0ae560b52bfe5b3905ae87df791d349e053ec97 Reviewed-on: https://gem5-review.googlesource.com/4660 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2017-09-25mem: Record the request master ID in the PacketInfo structure.Gabe Black
That can be recorded in a packet trace. Change-Id: I3813ab4ea5aadeb40b355ff01f10e8ecab2bb790 Reviewed-on: https://soc-sim-internal-review.googlesource.com/3482 Reviewed-by: Rahul Thakur <rjthakur@google.com> Reviewed-on: https://gem5-review.googlesource.com/4780 Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com> Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
2017-09-21sim: Stop using loadState in the Root SimObject.Gabe Black
The primary difference between using loadState and letting the default implementation of loadState call unserialize is that whether or not that code is called is dependent on that object being associated with a section in the checkpoint file being unserialized. Since there's always a "root" object, there should always be a section for it in the checkpoint and those should be equivalent. This removes one custom implementation of the loadState function. Change-Id: Ia674ccc18e141f38746e22ccfddc21475b1a0731 Reviewed-on: https://gem5-review.googlesource.com/4740 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2017-08-01sim: Use named constants for pseudo opsAndreas Sandberg
Use named constants from a shared header instead of magic values when handling pseudo ops. Change-Id: If157060bbcd772ce7e8556482b44ca714f4319b1 Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com> Reviewed-on: https://gem5-review.googlesource.com/4262 Reviewed-by: Gabe Black <gabeblack@google.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
2017-07-20sim: Prevent segfault in the wakeCpu m5op if id is invalidJose Marinho
Change-Id: I86229cedb206e10326cdee3f09a5c871e49c8d48 Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/3965
2017-07-17sim, x86: Make clone a virtual functionSean Wilson
This fixes the function call to clone in syscall_emul.hh where the x86 version should be called before the base implementation of clone. Change-Id: Iccd2f680ff6e3a5536037d688a80ab3f236bbd98 Signed-off-by: Sean Wilson <spwilson2@wisc.edu> Reviewed-on: https://gem5-review.googlesource.com/3902 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Jason Lowe-Power <jason@lowepower.com>
2017-07-12sim, gdb: Refactor some Event subclasses into lambdasSean Wilson
Change-Id: If3e4329204f27eda96b50ec6ac279ebc6ef23d99 Signed-off-by: Sean Wilson <spwilson2@wisc.edu> Reviewed-on: https://gem5-review.googlesource.com/3921 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2017-07-12cpu, sim: Add param to force CPUs to wait for GDBJose Marinho
By setting the BaseCPU parameter wait_for_dbg_connection, the GDB server blocks during initialisation waiting for the remote debugger to connect before starting the simulated CPU. Change-Id: I4d62c68ce9adf69344bccbb44f66e30b33715a1c [ Update info message to include remote GDB port, rename param. ] Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/3963 Reviewed-by: Gabe Black <gabeblack@google.com> Reviewed-by: Anthony Gutierrez <anthony.gutierrez@amd.com>
2017-07-10sim: Fix clashing stat names in TickedObject and TickedJose Marinho
Change tickCycles numCycles stat name to totalTickCycles os as not to clash with the name of the tickCycles stat of the same class. Declared the params passed to the TickedObject constructer as const. Call ClockedObject::regStats() from the TickedObject::regStats to ensure the correct initialization of the base class (ClockedObject) stats Change-Id: I6cf5bbe10fa27f2ad0e31d9f70ec3be47fe41455 Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/3964 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Jason Lowe-Power <jason@lowepower.com>
2017-07-05cpu: Added interface for vector reg fileRekai Gonzalez-Alberquilla
This patch adds some more functionality to the cpu model and the arch to interface with the vector register file. This change consists mainly of augmenting ThreadContexts and ExecContexts with calls to get/set full vectors, underlying microarchitectural elements or lanes. Those are meant to interface with the vector register file. All classes that implement this interface also get an appropriate implementation. This requires implementing the vector register file for the different models using the VecRegContainer class. This change set also updates the Result abstraction to contemplate the possibility of having a vector as result. The changes also affect how the remote_gdb connection works. There are some (nasty) side effects, such as the need to define dummy numPhysVecRegs parameter values for architectures that do not implement vector extensions. Nathanael Premillieu's work with an increasing number of fixes and improvements of mine. Change-Id: Iee65f4e8b03abfe1e94e6940a51b68d0977fd5bb Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> [ Fix RISCV build issues and CC reg free list initialisation ] Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/2705
2017-07-05kvm: move Kvm check from ARM Kvm GIC to SystemCurtis Dunham
The check was nearly completely generic anyway, with the exception of the Kvm CPU type. This will make it easier for other parts of the codebase to do similar checks. Change-Id: Ibfdd3d65e9e6cc3041b53b73adfabee1999283da Reviewed-on: https://gem5-review.googlesource.com/3540 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2017-06-21sim: Updated ClockedObject power state warningJason Lowe-Power
To prevent this warning from printing for *every* simulation, this patch adds a check to only print the warning if we are not at the beginning of simulation. Change-Id: I7f6154f0ca26bef6280f909f799aa1c7936b624a Signed-off-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-on: https://gem5-review.googlesource.com/3840 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2017-06-20sim, x86: Replace EventWrapper use with EventFunctionWrapperSean Wilson
Change-Id: Ie1df07b70776208fc3631a73d403024636fc05a9 Signed-off-by: Sean Wilson <spwilson2@wisc.edu> Reviewed-on: https://gem5-review.googlesource.com/3749 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Anthony Gutierrez <anthony.gutierrez@amd.com> Maintainer: Anthony Gutierrez <anthony.gutierrez@amd.com>
2017-06-20sim: Add generic EventFunctionWrapperSean Wilson
Add EventFunctionWrapper, an event wrapper which takes any callable object to use as its callback. (This includes c++ lambdas, function pointers, bound functions, and std::functions.) Change-Id: Iab140df47bd0f7e4b3fe3b568f9dd122a43cee1c Signed-off-by: Sean Wilson <spwilson2@wisc.edu> Reviewed-on: https://gem5-review.googlesource.com/3743 Reviewed-by: Anthony Gutierrez <anthony.gutierrez@amd.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Anthony Gutierrez <anthony.gutierrez@amd.com>
2017-06-20sim: Remove DelayFunctionSean Wilson
`DelayFunction` is unused. Change-Id: I28aa756054c9b121fe4cfa65c393366f26ccb128 Signed-off-by: Sean Wilson <spwilson2@wisc.edu> Reviewed-on: https://gem5-review.googlesource.com/3741 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2017-05-25x86: sim: Make 32 bit x86 processes work again.Gabe Black
When the LiveProcess class was renamed to be just Process, the CL author also changed the syscall function from a virtual function into a regular one. Unfortunately, the I386Process class overrode the syscall function to adjust the return address so that control would return to the right place. Without that adjustment, 32 bit x86 process would segfault and die immediately after their first system call. This change reinstates the virtual specifier on the base syscall function, and adds an override keyword on the I386Process's version so that it won't be orphaned again in the future. It also fixes some small style issues the style checker script complained about. Change-Id: I0d1178ea0eda6676050c8fc043820a2bb4d99c0d Reviewed-on: https://gem5-review.googlesource.com/3500 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Brandon Potter <Brandon.Potter@amd.com> Maintainer: Jason Lowe-Power <jason@lowepower.com>
2017-05-24sim: Add hooks to implement event reference countingAndreas Sandberg
We currently only support deleting an event if it is triggered and not re-scheduled. This is fine for most native code. However, there are cases where Python needs to count references to make sure that the Python object stays live while the native object is live. Generalise the mechanism used to implement by adding reference counting hooks to the event base class: * Event::acquire() / Event::acquireImpl() * Event::release() / Event::releaseImpl() These calls can be used to implement both reference counting and the existing AutoDelete functionality. The default implementation in Event maintains backwards compatibility with the existing AutoDelete feature by ignoring acquireImpl() and deleting the event on releaseImpl() if it isn't scheduled anymore. Since AutoDelete functionality is no longer the only way events can be managed, this change introduces the new Managed flag. This flag activates automatic memory management. The acquireImpl()/releaseImpl() methods are only called from acquire()/release() it is set. To maintain backwards compatibility, AutoDelete is used as an alias for Managed. Change-Id: I5637984c906a9d44c22780712cf1c521b8297149 Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Curtis Dunham <curtis.dunham@arm.com> Reviewed-on: https://gem5-review.googlesource.com/3221 Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
2017-05-19base, sim, arch: Fix clang 5.0 warningsAndreas Sandberg
Compiling gem5 with recent version of clang (4 and 5) triggers warnings that are treated as errors: * Global templatized static functions result in a warning if they are not used. These should either be declared as static inline or without the static identifier to avoid the warning. * Some templatized classes contain static variables. The instantiated versions of these variables / templates need to be explicitly declared to avoid a compiler warning. Change-Id: Ie8261144836e94ebab7ea04ccccb90927672c257 Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Curtis Dunham <curtis.dunham@arm.com> Reviewed-on: https://gem5-review.googlesource.com/3420 Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
2017-05-12syscall_emul: Fix undefined macro behaviorAndreas Sandberg
Clang's UBSAN implementation complains about macros that expand to expressions that contain 'defined'. Explicitly set the various feature macros to 1 or 0 to avoid this issue. Change-Id: Iba239dacfe526c43ab9c5da5183a350fc4fdc57d Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Andreas Hansson <andreas.hansson@arm.com> Reviewed-by: Curtis Dunham <curtis.dunham@arm.com> Reviewed-on: https://gem5-review.googlesource.com/3241
2017-05-05syscall_emul: Argument retrieval bug fixAlexandru Dutu
This commit fixes a stack-buffer underflow by fixing the way the array is indexed. Change-Id: I44400e2b99a2f8e1f48f673cd110b9dcd6480a72 Reviewed-on: https://gem5-review.googlesource.com/3040 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Curtis Dunham <curtis.dunham@arm.com> Maintainer: Brandon Potter <Brandon.Potter@amd.com>
2017-05-02base, sim, dev: Remove SWIGAndreas Sandberg
Remove SWIG guards and SWIG-specific C++ code. Change-Id: Icaad6720513b6f48153727ef3f70e0dba0df4bee Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Andreas Hansson <andreas.hansson@arm.com> Reviewed-by: Curtis Dunham <curtis.dunham@arm.com> Reviewed-on: https://gem5-review.googlesource.com/2921 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Tony Gutierrez <anthony.gutierrez@amd.com>
2017-05-02python: Use PyBind11 instead of SWIG for Python wrappersAndreas Sandberg
Use the PyBind11 wrapping infrastructure instead of SWIG to generate wrappers for functionality that needs to be exported to Python. This has several benefits: * PyBind11 can be redistributed with gem5, which means that we have full control of the version used. This avoid a large number of hard-to-debug SWIG issues we have seen in the past. * PyBind11 doesn't rely on a custom C++ parser, instead it relies on wrappers being explicitly declared in C++. The leads to slightly more boiler-plate code in manually created wrappers, but doesn't doesn't increase the overall code size. A big benefit is that this avoids strange compilation errors when SWIG doesn't understand modern language features. * Unlike SWIG, there is no risk that the wrapper code incorporates incorrect type casts (this has happened on numerous occasions in the past) since these will result in compile-time errors. As a part of this change, the mechanism to define exported methods has been redesigned slightly. New methods can be exported either by declaring them in the SimObject declaration and decorating them with the cxxMethod decorator or by adding an instance of PyBindMethod/PyBindProperty to the cxx_exports class variable. The decorator has the added benefit of making it possible to add a docstring and naming the method's parameters. The new wrappers have the following known issues: * Global events can't be memory managed correctly. This was the case in SWIG as well. Change-Id: I88c5a95b6cf6c32fa9e1ad31dfc08b2e8199a763 Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Andreas Hansson <andreas.hansson@arm.com> Reviewed-by: Andrew Bardsley <andrew.bardsley@arm.com> Reviewed-on: https://gem5-review.googlesource.com/2231 Reviewed-by: Tony Gutierrez <anthony.gutierrez@amd.com> Reviewed-by: Pierre-Yves Péneau <pierre-yves.peneau@lirmm.fr> Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
2017-04-11power: Allow global stats in power equationsStephan Diestelhorst
Allow global stats such as sim_seconds in power equations to make it possible to convert from event stats to rate stats. Change-Id: I429abe0ffadc0dbd162eb39e0897143be472ef65 Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/2720 Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
2017-04-08power: Clarify the unit used for the power equations (W)Stephan Diestelhorst
Change-Id: Iab5070fc9b666fcb5b49b0e2b99a4a1605b3b721 Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
2017-04-06power: Add a voltage variable to power expressionsAndreas Sandberg
There is currently no good way of extracting the current operating voltage in MathExprPowerModels. This change adds a magic variable, 'voltage', that can be referenced from such expressions to get the current operating voltage. Change-Id: Ice3c9a4a221921a542de5da52f83f3f88862d246 Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com> Reviewed-by: Sascha Bischoff <sascha.bischoff@arm.com> Reviewed-on: https://gem5-review.googlesource.com/2662 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Jason Lowe-Power <jason@lowepower.com>
2017-04-06power: Add error checking to MathExprPowerModelAndreas Sandberg
MathExprPower model currently doesn't print any useful error messages if an expression fails to evaluate. To add insult to injury, the model only detects a failure when dumping stats and not at initialization. This change adds a verification step in startup() that ensures that all of the referenced stats actually exist. Change-Id: I8f71c73341578d5882c8d93e482f5383fbda5f1d Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com> Reviewed-by: Sascha Bischoff <sascha.bischoff@arm.com> Reviewed-on: https://gem5-review.googlesource.com/2661 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Jason Lowe-Power <jason@lowepower.com>
2017-04-03sim: Handle cases where Drainable::resume() creates objectsAndreas Sandberg
There are cases where Drainable objects need to create new objects in Drainable::resume(). In such cases, the local drain state will be inherited from the DrainManager. We currently set the state to Running as soon as we start resuming the simulator. This means that new objects are created in the Running state rather than the Drained state, which the resume code assumes. Depending on the traversal order in DrainManager::resume(), this sometimes triggers a panic because the object being resumed is in the wrong state. This change introduces a new drain state, Resuming, that the DrainManager enters as soon as it starts resuming the simulator. Objects that are created while resuming are created in this state. Such objects are then resumed in a subsequent pass over the list of Drainable objects that need to be resumed. Once all objects have been resumed, the simulator enters the Running state. Change-Id: Ieee8645351ffbdec477e9cd2ff86fc795e459617 Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Curtis Dunham <curtis.dunham@arm.com> Reviewed-on: https://gem5-review.googlesource.com/2600 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Weiping Liao <weipingliao@google.com>
2017-03-17syscall-emul: Hotfix for FreeBSD/Mac buildsBrandon Potter
The clone system call added in 236719892 relies on header files from Linux systems. Obviously, this prevents compilation for anyone using FreeBSD or Mac to compile the simulator. This changeset is meant as a temporary fix to allow builds on non-Linux systems until a proper solution is found. Change-Id: I404cc41c588ed193dd2c1ca0c1aea35b0786fe4e Reviewed-on: https://gem5-review.googlesource.com/2420 Maintainer: Brandon Potter <Brandon.Potter@amd.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
2017-03-17syscall-emul: change NULL to nullptr in Process filesBrandon Potter
Change-Id: I9ff21092876593237f919e9f7fb7283bd865ba2e Reviewed-on: https://gem5-review.googlesource.com/2421 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Brandon Potter <Brandon.Potter@amd.com>
2017-03-09style: change NULL to nullptr in syscall filesBrandon Potter
Change-Id: I02719f3572f6665cace1eb5681f297dcde9e71ce Reviewed-on: https://gem5-review.googlesource.com/2271 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Michael LeBeane <Michael.Lebeane@amd.com> Reviewed-by: Tony Gutierrez <anthony.gutierrez@amd.com> Maintainer: Jason Lowe-Power <jason@lowepower.com>
2017-03-09syscall-emul: Rewrite system call exit codeBrandon Potter
The changeset does a major refactor on the exit, exit_group, and futex system calls regarding exit functionality. A FutexMap class and related structures are added into a new file. This increases code clarity by encapsulating the futex operations and the futex state into an object. Several exit conditions were added to allow the simulator to end processes under certain conditions. Also, the simulation only exits now when all processes have finished executing. Change-Id: I1ee244caa9b5586fe7375e5b9b50fd3959b9655e Reviewed-on: https://gem5-review.googlesource.com/2269 Maintainer: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
2017-03-09syscall-emul: Add the tgkill system callBrandon Potter
This changeset adds support to kill a thread group by calling the tgkill system call. The functionality is needed in some pthread applications. Change-Id: I0413a3331be69b74dfab30de95384113ec4efb63 Reviewed-on: https://gem5-review.googlesource.com/2268 Maintainer: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Tony Gutierrez <anthony.gutierrez@amd.com> Reviewed-by: Michael LeBeane <Michael.Lebeane@amd.com>
2017-03-09syscall-emul: Adds SE mode signal featureBrandon Potter
This changeset adds a simple class definition and a member in the System object to track signals sent between processes. The implementation cannot support all signals that might be sent between processes, but it can support some of the simple use cases like SIGCHLD. Change-Id: Id5f95aa60e7f49da1c5b5596fbfa26e729453ac7 Reviewed-on: https://gem5-review.googlesource.com/2267 Reviewed-by: Michael LeBeane <Michael.Lebeane@amd.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Jason Lowe-Power <jason@lowepower.com>
2017-03-09syscall-emul: Add or extend dup, dup2, and pipeBrandon Potter
This changeset extends the pipe system call to work with architectures other than Alpha (and enables the syscall for x86). For the dup system call, it sets the clone-on-exec flag by default. For the dup2 system call, the changeset adds an implementation (and enables it for x86). Change-Id: I00ddb416744ee7dd61a5cd02c4c3d97f30543878 Reviewed-on: https://gem5-review.googlesource.com/2266 Maintainer: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Tony Gutierrez <anthony.gutierrez@amd.com> Reviewed-by: Michael LeBeane <Michael.Lebeane@amd.com>
2017-03-09syscall-emul: Add functionality to open syscallsBrandon Potter
This changeset adds refactors the existing open system call, adds the openat variant (enabled for x86 builds), and adds additional "special file" test cases for /proc/meminfo and /etc/passwd. Change-Id: I6f429db65bbf2a28ffa3fd12df518c2d0de49663 Reviewed-on: https://gem5-review.googlesource.com/2265 Maintainer: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Tony Gutierrez <anthony.gutierrez@amd.com> Reviewed-by: Michael LeBeane <Michael.Lebeane@amd.com>
2017-03-09style: Correct some style issuesBrandon Potter
This changeset fixes line alignment issues, spacing, spelling, etc. for files that are used during SE Mode. Change-Id: Ie61b8d0eb4ebb5af554d72f1297808027833616e Reviewed-on: https://gem5-review.googlesource.com/2264 Maintainer: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Tony Gutierrez <anthony.gutierrez@amd.com> Reviewed-by: Michael LeBeane <Michael.Lebeane@amd.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Pierre-Yves Péneau <pierre-yves.peneau@lirmm.fr>
2017-03-09syscall-emul: Move memState into its own fileBrandon Potter
The Process class is full of implementation details and structures related to SE Mode. This changeset factors out an internal class from Process and moves it into a separate file. The purpose behind doing this is to clean up the code and make it a bit more modular. Change-Id: Ic6941a1657751e8d51d5b6b1dcc04f1195884280 Reviewed-on: https://gem5-review.googlesource.com/2263 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>