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AgeCommit message (Expand)Author
2012-01-07Another merge with the main repository.Gabe Black
2012-01-07Merge with the main repository again.Gabe Black
2012-01-07Merge with main repository.Gabe Black
2012-01-05eventq: add a function for replacing head of the queueNilay Vaish
2011-12-01SE: Don't warn when not extending stack as it's too noisy with O3.Ali Saidi
2011-11-18SE/FS: Get rid of includes of config/full_system.hh.Gabe Black
2011-11-02SE/FS: Get rid of FULL_SYSTEM in sim.Gabe Black
2011-10-31SE/FS: Make the functions available from the TC consistent between SE and FS.Gabe Black
2011-10-30SE/FS: Compile in system events in SE mode.Gabe Black
2011-10-30System: Push boot_cpu_frequency down into the subclasses that actually use it.Gabe Black
2011-10-30SE/FS: Build syscall_emul.cc in FS mode.Gabe Black
2011-10-30SE/FS: Make the system object more consistent between SE and FS.Gabe Black
2011-10-30SE/FS: Build the base process class in FS.Gabe Black
2011-10-22SE: move page allocation from PageTable to ProcessSteve Reinhardt
2011-10-22syscall_emul: implement MAP_FIXED option to mmap()Steve Reinhardt
2011-10-20SimObject: add export_method* hooks to export C++ methods to PythonSteve Reinhardt
2011-10-20scons/swig: refactor some of the scons/SWIG codeSteve Reinhardt
2011-10-16SE/FS: Make some system funcs available in SE and FS.Gabe Black
2011-09-30SE/FS: Remove System::platform and Platform::intrFrequency.Gabe Black
2011-09-27Faults: Make the generic faults more consistent between SE and FS.Gabe Black
2011-09-26SE/FS: Define a const bool FullSystem which will equal FULL_SYSTEM.Gabe Black
2011-09-22event: minor cleanupSteve Reinhardt
2011-09-22pseudo_inst: clean up workbegin/workend functionsSteve Reinhardt
2011-09-19Faults: Get rid of the unused isAlignmentFault and isMachineCheckFault.Gabe Black
2011-09-19Endianness: Make it easier to check the compiled in guest endianness.Gabe Black
2011-09-19PseudoInst: Make all the pseudo insts available in SE and FS.Gabe Black
2011-09-18Pseudoinst: Add an initParam pseudo inst function.Gabe Black
2011-09-13LSQ: Only trigger a memory violation with a load/load if the value changes.Ali Saidi
2011-09-10PseudoInst: Add compiler guards to pseudo_inst.hh.Gabe Black
2011-09-09Stack: Tidy up some comments, a warning, and make stack extension consistent.Gabe Black
2011-09-02TLB: comments and a helpful warning.Lisa Hsu
2011-07-10O3: Make sure fetch doesn't go off into the weeds during speculation.Ali Saidi
2011-06-02scons: rename TraceFlags to DebugFlagsNathan Binkert
2011-06-02copyright: clean up copyright blocksNathan Binkert
2011-05-23sim: style fixes in sim/process.hhSteve Reinhardt
2011-05-23syscall emul: fix Power Linux mmap constant, plus other cleanupSteve Reinhardt
2011-05-23sim: add some DPRINTFs for debugging unserializationSteve Reinhardt
2011-05-04Debug: Add a function to cause the simulator to create a checkpoint from GDB.Ali Saidi
2011-05-04Core: Add some documentation about the sim clocks.Ali Saidi
2011-04-19stats: rename stats so they can be used as python expressionsNathan Binkert
2011-04-15python: cleanup python code so stuff doesn't automatically happen at startupNathan Binkert
2011-04-15scons: make a flexible system for guarding source filesNathan Binkert
2011-04-15trace: reimplement the DTRACE function so it doesn't use a vectorNathan Binkert
2011-04-15debug: create a Debug namespaceNathan Binkert
2011-04-15includes: sort all includesNathan Binkert
2011-03-29sim: typecast Tick to UTick for eventQ assertKorey Sewell
2011-03-17ARM: Add minimal ARM_SE support for m5threads.Chris Emmons
2011-03-17ARM: Allow conditional quiesce instructions.Ali Saidi
2011-02-11Serialization: Allow serialization of stl listsAli Saidi
2011-02-11O3: Enhance data address translation by supporting hardware page table walkers.Giacomo Gabrielli