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2020-01-07arch,sim: Stop decoding the pseudo inst subfunc value.Gabe Black
This isn't used by anything any more. The func field is left in place to ensure compatability, but there's no reason to decode a value nobody is going to use. Jira Issue: https://gem5.atlassian.net/browse/GEM5-187 Change-Id: I85fcd0e4a362551c29af6bff350d99af86050415 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23179 Tested-by: kokoro <noreply+kokoro@google.com> Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Maintainer: Gabe Black <gabeblack@google.com>
2020-01-06arch,sim: Use the guest ABI mechanism with pseudo instructions.Gabe Black
Right now, there are only two places which call the pseudoInst function directly, the ARM KVM CPU and the generic mmapped IPR. These two callers currently use the generic "PseudoInstABI" which is just a wrapper around the existing getArgument function. In the future, this getArgument function will be disolved, and the PseudoInstABI will be defined for each ABI. Since it currently mimics the Linux ABI since gem5 can only handle one ABI at a time right now, this implementation will probably be shared by linux system calls, except that the pseudo inst implementation will eat return values since those are returned through other means when the pseudo inst is based on magic address ranges. Jira Issue: https://gem5.atlassian.net/browse/GEM5-187 Change-Id: Ied97e4a968795158873e492289a1058c8e4e411b Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23178 Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu> Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Maintainer: Gabe Black <gabeblack@google.com> Tested-by: kokoro <noreply+kokoro@google.com>
2020-01-03sim: Move destructor of Port to publicYu-hsin Wang
To preventing from instantiating an abstract class, hiding its constructor is enough. Moving destructor to public doesn't break this intention. This also makes us can use smart pointer to manage derived Port class. Change-Id: Ic9cf97e90a6c26108d359eb459df48cd23eaf15c Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23925 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com> Tested-by: kokoro <noreply+kokoro@google.com>
2019-12-18sim: kernelExtras optional load addressesAdrian Herrera
This patch provides a new "System" parameter named "kernel_extras_addrs". This allows to optionally specify fixed load addresses for the additional kernel objects. This is useful to load arbitrary blobs into memory. Change-Id: I4725763b86c29f72282d1c184d4284d90f9d3016 Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23566 Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Jason Lowe-Power <jason@lowepower.com> Tested-by: kokoro <noreply+kokoro@google.com>
2019-12-17sim: Include some required headers in the syscall debug macros header.Gabe Black
Everything that includes syscall_debug_macros.hh and uses the macro in it will need these headers, so they should be included through syscall_debug_macros.hh. The consumer shouldn't have to know what the macros use internally and to include extra headers to support them. Change-Id: I9bfa932368daec0772d552357ecad8790b4cfead Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23459 Tested-by: kokoro <noreply+kokoro@google.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Jason Lowe-Power <jason@lowepower.com>
2019-12-16sim: kernelExtras if no kernel providedAdrian Herrera
kernelExtras facilitates a way for users to provide additional blobs to load into memory. As of now, the creation of the extra images is done independently of the kernel being provided, but the loading is only done if the kernel is present. This patch refactors the loading of extra images to be committed if no kernel is present. Change-Id: I900542e1034ade8d757d01823cfd4a30f0b36734 Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/22850 Tested-by: kokoro <noreply+kokoro@google.com> Reviewed-by: Gabe Black <gabeblack@google.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Jason Lowe-Power <jason@lowepower.com>
2019-12-10sim,arch: Collapse the ISA specific versions of m5Syscall.Gabe Black
The x86 version doesn't do anything x86 specific, and so can be used generically in sim/pseudo_inst.(hh|cc) Jira Issue: https://gem5.atlassian.net/browse/GEM5-187 Change-Id: I46c2a7d326bd7a95daa8611888051c180e92e446 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23177 Tested-by: kokoro <noreply+kokoro@google.com> Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
2019-12-10arch,cpu,sim: Push syscall number determination up to processes.Gabe Black
The logic that determines which syscall to call was built into the implementation of faults/exceptions or even into the instruction decoder, but that logic can depend on what OS is being used, and sometimes even what version, for example 32bit vs. 64bit. This change pushes that logic up into the Process objects since those already handle a lot of the aspects of emulating the guest OS. Instead, the ISA or fault implementations just notify the rest of the system that a nebulous syscall has happened, and that gets propogated upward until the process does something with it. That's very analogous to how a system call would work on a real machine. When a system call happens, the low level component which detects that should call tc->syscall(&fault), where tc is the relevant thread (or execution) context, and fault is a Fault which can ultimately be set by the system call implementation. The TC implementor (probably a CPU) will then have a chance to do whatever it needs to to handle a system call. Currently only O3 does anything special here. That implementor will end up calling the Process's syscall() method. Once in Process::syscall, the process object will use it's contextual knowledge to determine what system call is being requested. It then calls Process::doSyscall with the right syscall number, where doSyscall centralizes the common mechanism for actually retrieving and calling into the system call implementation. Jira Issue: https://gem5.atlassian.net/browse/GEM5-187 Change-Id: I937ec1ef0576142c2a182ff33ca508d77ad0e7a1 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23176 Maintainer: Gabe Black <gabeblack@google.com> Tested-by: kokoro <noreply+kokoro@google.com> Reviewed-by: Brandon Potter <Brandon.Potter@amd.com>
2019-12-10arch: Get rid of the now unused setSyscallArg.Gabe Black
Setting syscall args isn't really something we need to do in gem5, since that will be taken care of by the code actually calling the syscall. We just need to be able to retrieve the value it put there. Jira Issue: https://gem5.atlassian.net/browse/GEM5-187 Change-Id: I0bb6d5d0207a7892414a722b3788cb70ee509582 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23174 Tested-by: kokoro <noreply+kokoro@google.com> Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
2019-12-10sim: Add a wrapper/subclass for SyscallDesc which uses GuestABI.Gabe Black
This will let system call implementations take arguments naturally, and centrally defined, potentially complex, and ISA/context specific mechanisms will automatically gather the arguments and store any result. Jira Issue: https://gem5.atlassian.net/browse/GEM5-187 Change-Id: I68d265e0bab5de372ba975e4c7e9bb2d968c80af Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23172 Tested-by: kokoro <noreply+kokoro@google.com> Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
2019-12-10sim: Add a mechanism to translate ABIs to call host funcs from a TC.Gabe Black
The guest ABI is specified as a template parameter. This makes it possible for host simcall handlers to be called through different ABIs which might be from different ISAs, or might be from different contexts within the same ISA (32 vs 64 bit, syscall vs. function vs. pseudo instrunction vs. semihosting call). Jira Issue: https://gem5.atlassian.net/browse/GEM5-187 Change-Id: I66a0f558e9c1f70a142b69b0dd95bd71e41d898b Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23171 Tested-by: kokoro <noreply+kokoro@google.com> Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
2019-12-10sim: Get rid of the now unused SyscallDesc flags and methods.Gabe Black
Jira Issue: https://gem5.atlassian.net/browse/GEM5-187 Change-Id: Icee18a4bd77a346d7f82ef4988651b753392d51e Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23170 Tested-by: kokoro <noreply+kokoro@google.com> Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
2019-12-10sim: Reintroduce the ignoreWarnOnceFunc syscall handler.Gabe Black
Instead of just using warn_once, we'll gate each warning on a bool which is associated with the syscall desc pointer. To avoid having to keep warn once bookkeeping in every syscall desc, we put it in a map which is looked up at runtime. Jira Issue: https://gem5.atlassian.net/browse/GEM5-187 Change-Id: I1dcce48de91b8a635f9f3df3bfc0ed6ba1291c4f Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23168 Maintainer: Gabe Black <gabeblack@google.com> Tested-by: kokoro <noreply+kokoro@google.com> Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Brandon Potter <Brandon.Potter@amd.com>
2019-12-10sim: Make the syscalls use the SyscallReturn suppression mechanism.Gabe Black
This, among other things, prevents them from needing to toggle global flags in the syscall desc table to control local behavior. Jira Issue: https://gem5.atlassian.net/browse/GEM5-187 Change-Id: Idcef23766084f10d5205721b54a6768a850f7eb9 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23167 Maintainer: Gabe Black <gabeblack@google.com> Tested-by: kokoro <noreply+kokoro@google.com> Reviewed-by: Brandon Potter <Brandon.Potter@amd.com>
2019-12-04sim: Add a suppression mechanism to the SyscallReturn class.Gabe Black
It makes more sense to specify whether something should be returned based on the return, not intrinsically on the syscall. This is especially true in cases like execve where the expected behavior is not constant. Jira Issue: https://gem5.atlassian.net/browse/GEM5-187 Change-Id: I95b53b6d69445c7a04c0049fbb0f439238d971e8 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23166 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com> Tested-by: kokoro <noreply+kokoro@google.com>
2019-12-04sim: Small style fixes in sim/syscall_return.hh.Gabe Black
Jira Issue: https://gem5.atlassian.net/browse/GEM5-187 Change-Id: I485004843393c2e10c1ff4dbd84fc30ca4fd490c Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23165 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com> Tested-by: kokoro <noreply+kokoro@google.com>
2019-12-04sim: Change the syscall executor to a std::function.Gabe Black
This will enable using other types of callable like a lambda. Jira Issue: https://gem5.atlassian.net/browse/GEM5-187 Change-Id: If9f7176205492830824b5fe3c00f2c7710f57f70 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23164 Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Maintainer: Gabe Black <gabeblack@google.com> Tested-by: kokoro <noreply+kokoro@google.com>
2019-12-03sim-se: Avoid function overloading for syscall implementationGiacomo Travaglini
This patch is aligning the readlink and access syscalls to the open one, which is not overloading the openFunc, but it is factoring the implementation into a openImpl, which is used by both open and openat. This is needed if passing them to std::function, whose constructor is not able to handle overloaded functions. Change-Id: I50a8aacdfd675181b6fe9a2696220ee29cc5bc4b Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23260 Reviewed-by: Brandon Potter <Brandon.Potter@amd.com> Maintainer: Brandon Potter <Brandon.Potter@amd.com> Tested-by: kokoro <noreply+kokoro@google.com>
2019-11-27sim-se: Check Path redirection when mmappingGiacomo Travaglini
Every syscall file access should go through the redirection process Change-Id: I1ba2063b5a254e11f47392bdad0bf0887ba73d3d Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23063 Reviewed-by: Brandon Potter <Brandon.Potter@amd.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Brandon Potter <Brandon.Potter@amd.com> Tested-by: kokoro <noreply+kokoro@google.com>
2019-11-26sim: prefix --debug-flags Event logs with the flag nameCiro Santilli
Sample output of FmtFlag,ExecAll,Event: 0: Event: Event_70: generic event rescheduled @ 18446744073709551615 0: ExecEnable: system.cpu: A0 T0 : @asm_main_after_prologue 0: Event: AtomicSimpleCPU tick.wrapped_function_event 500: ExecEnable: system.cpu: A0 T0 : @asm_main_after_prologue+4 500: Event: AtomicSimpleCPU tick.wrapped_function_event 1000: ExecEnable: system.cpu: A0 T0 : @asm_main_after_prologue+8 1000: Event: AtomicSimpleCPU tick.wrapped_function_event 1500: ExecEnable: system.cpu: A0 T0 : @asm_main_after_prologue+12 1500: Event: AtomicSimpleCPU tick.wrapped_function_event Change-Id: I7f252b57d7778a15a3dda40d909bdb4425557a40 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/22009 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Jason Lowe-Power <jason@lowepower.com> Tested-by: kokoro <noreply+kokoro@google.com>
2019-11-25sim-se: don't wake up threads that are halted on futexCiro Santilli
At Ia6b4d3e6148c64721d810b8f1fffaa208a394b06 the futex wake up started skipping selecting threads that are already awake, which already prevented some deadlocks. However, threads that are Halting or Halted should not be woken up either, as those represent cores in which processes have already exited. Before this commit, this could lead an exited core to wake up, which would then immediately re-execute the exit syscall, and possibly leave one genuinely sleeping core locked and: Exiting @ tick 18446744073709551615 because simulate() limit reached Change-Id: I1531b56d605d47252dc0620bb3e755b7cf84df97 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/22963 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Brandon Potter <Brandon.Potter@amd.com> Maintainer: Jason Lowe-Power <jason@lowepower.com> Tested-by: kokoro <noreply+kokoro@google.com>
2019-11-21base: Remove tests making use of Big/LittleEndianOrder NamespaceGiacomo Travaglini
Unit tests are currently broken. commit d40f0bc579fb8b10da7181d3a144cd3e9a0a0e59 is removing the BigEndianOrder and LittleEndianOrder namespace. Therefore we shouldn't test them and their helpers. Change-Id: I68a45f264b782334d0a0f725c2c435c27337e757 Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com> Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/22943 Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu> Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu> Tested-by: kokoro <noreply+kokoro@google.com>
2019-11-20base,tests: Expanded GTests for addr_range.hhBrandon Potter
These tests assume the "end address" is not included in the range. This exposed some bugs in addr_range.hh which have been fixed. Where appropriate code comments in addr_range.hh have been extended to improve understanding of the class's behavior. Hard-coded AddrRange values in the project have been updated to take into account that end address is now exclusive. The python params.py interface has been updated to conform to this new standard. Change-Id: Idd1e75d5771d198c4b8142b28de0f3a6e9007a52 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/22427 Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu> Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com> Tested-by: kokoro <noreply+kokoro@google.com>
2019-11-18arch: Get rid of the (Big|Little)EndianGuest namespaces.Gabe Black
These namespaces were used to set up an environment/context where there was an implicit guest namespace. This is an issue when there may be multiple guest endiannesses which might be different. In cases where we don't know what the guest endianness is, we can't rely on it being an implicit part of our context since that would be ambiguous. In cases where we do know, for instance in ISA specific code, we can just use the endianness specific version that's appropriate for that context. This also (somewhat) removes the assumption that there is a single endianness that applies for a particular ISA. Practically speaking this assumption will probably still stand though, since there would likely be a non-trivial performance penalty to apply a configurable endianness instead of a fixed one the compiler can optomize/remove. Change-Id: I2dff338b58726d724f387388efe32d9233885680 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/22374 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Maintainer: Gabe Black <gabeblack@google.com> Tested-by: kokoro <noreply+kokoro@google.com>
2019-11-16tests: Added GTests for byteswap.hhBobby R. Bruce
In addition to the test, "#include base/logging.hh" was added to the "byteswap.hh". It is is required to compile the header. Added tests ByteswapTest.swap_byte64, ByteswapTest.swap_byte32, ByteswapTest.swap_byte16, ByteswapTest.swap_byte, ByteswapTest.htog, and ByteswapTest.gtoh. The file byteswap.hh is mostly templates. Added test for BigEndianGuest and LittleEndianGuest namespaces. Change-Id: I8870a55594ed439fe9e1fb333384f73261d1b1b8 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/22080 Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu> Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu> Tested-by: kokoro <noreply+kokoro@google.com>
2019-10-30arch,sim: Make copyStringArray take an explicit endianness.Gabe Black
Change-Id: I5cf4291b19dd2d2bdbbf145ad8e00994fabf5547 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/22366 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Brandon Potter <Brandon.Potter@amd.com> Maintainer: Gabe Black <gabeblack@google.com> Tested-by: kokoro <noreply+kokoro@google.com>
2019-10-30sim: Use the system and OS to get endianness.Gabe Black
This converts the syscall implementations to either use the OS::byteOrder constant or, if that's not available, the system's getGuestByteOrder() accessor, to determine the byte order, instead of relying on TheISA to provide the correct accessor. Change-Id: Idf7b02ee8d73990224ceac9a5efaec91a5ebf79f Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/22364 Reviewed-by: Brandon Potter <Brandon.Potter@amd.com> Maintainer: Gabe Black <gabeblack@google.com> Tested-by: kokoro <noreply+kokoro@google.com>
2019-10-30sim: Add a getGuestByteOrder accessor to the system class.Gabe Black
This goes along with the existing getPageBytes, etc., accessors, and paves the way for this to be a parameter of the System class. Change-Id: Ibfe2d591185d23beccdd5bbff1092dc07b1278ac Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/22272 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> Tested-by: kokoro <noreply+kokoro@google.com>
2019-10-25cpu,sim: Delegate PCEvent scheduling from Systems to ThreadContexts.Gabe Black
The System keeps track of what events are live so new ThreadContexts can have the same set of events as the other ThreadContexts. Change-Id: Id22bfa0af7592a43d97be1564ca067b08ac1de7c Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/22106 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Gabe Black <gabeblack@google.com> Tested-by: kokoro <noreply+kokoro@google.com>
2019-10-25cpu,sim: Get rid of a bunch of conditional compilation for PCEvents.Gabe Black
These can now be built without referring to anything in ThreadContext and so can be built even with the NULL ISA. This means the pcEventQueue can be unconditionally built into the System class. Even though the pcEventQueue is going away, this still makes it possible for System to be a PCEventScope unconditionally. Change-Id: Ia342bb7972b1b5ce95033176d72af4bfa343560f Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/22104 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> Tested-by: kokoro <noreply+kokoro@google.com>
2019-10-25sim: Make the System object a PCEventScope.Gabe Black
This abstracts away the raw PCEventQueue managed by the System. Change-Id: I04d773e6be90a891884a76841f15c3eecd5796ed Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/22101 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Gabe Black <gabeblack@google.com> Tested-by: kokoro <noreply+kokoro@google.com>
2019-10-24cpu, sim-se: don't wake up threads that are awake in futexCiro Santilli
FutexMap::wakeup is called when the futex(TGT_FUTEX_WAKE syscall is done. FutexMap maintains a list of sleeping threads for each futex address added on FutexMap::suspend, and entries are removed from the list at FutexMap::wakeup. The problem is that this system was not taking into account that threads can be woken up by memory accesses to locked addresses via the path: SimpleThread::activate BaseSimpleCPU::wakeup AbstractMemory::checkLockedAddrList AbstractMemory::access DRAMCtrl::recvAtomic CoherentXBar::recvAtomicBackdoor SimpleExecContext::writeMem which happens on trivial pthread examples on ARM at least. The instruction that locked memory in those test cases was LDAXR. This could lead futex(TGT_FUTEX_WAKE to awake a thread that is already awake but is first on the sleeping thread list, instead of a sleeping one, which can lead all threads to incorrectly sleep and in turn to "simulate() limit reached". To implement this, ThreadContext::activate return now returns a boolean that indicates if the state changed. suspend and halt are also modified to also return a boolean in the same case for symmetry, although this is not strictly necessary for the current patch. Change-Id: Ia6b4d3e6148c64721d810b8f1fffaa208a394b06 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/21606 Reviewed-by: Brandon Potter <Brandon.Potter@amd.com> Maintainer: Brandon Potter <Brandon.Potter@amd.com> Tested-by: kokoro <noreply+kokoro@google.com>
2019-10-24sim-se: fix futexFunc TGT_FUTEX_WAIT always selects bitsetCiro Santilli
Change-Id: I3e2bd1dd34d7cc00b2685547ab74b56bd8126128 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/21605 Reviewed-by: Brandon Potter <Brandon.Potter@amd.com> Maintainer: Brandon Potter <Brandon.Potter@amd.com> Tested-by: kokoro <noreply+kokoro@google.com>
2019-10-16arch,base,sim: Move Process loader hooks into the Process class.Gabe Black
This code was originally in the ObjectFile class, but not all object files will become Processes. All Processes will ultimately come from ObjectFiles though, so it makes more sense to put that class there. Change-Id: Ie73e4cdecbb51ce53d24cf68911a6cfc0685d771 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/21468 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Gabe Black <gabeblack@google.com> Tested-by: kokoro <noreply+kokoro@google.com> Maintainer: Gabe Black <gabeblack@google.com>
2019-10-15sim,cpu: Get rid of the unused instEventQueue.Gabe Black
This queue was set up to allow triggering events based on the total number of instructions executed at the system level, and was added in a change which added a number of things to support McPAT. No code checked into gem5 actually schedules an event on that queue, and no code in McPAT (which seems to have gone dormant) either downloadable from github or found in ext modify gem5 in a way that makes it use the instEventQueue. Also, the KVM CPU does not interact with the instEventQueue correctly. While it does check the per-thread instruction event queue when deciding how long to run, it does not check the instEventQueue. It will poke it to run events when it stops for other reasons, but it may (and likely will) have run beyond the point where it was supposed to stop. Since this queue doesn't seem to actually be used for anything, isn't being used properly in all cases anyway, and adds overhead to all the CPU models, this change eliminates it. Change-Id: I0e126df14788c37a6d58ca9e1bb2686b70e60d88 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/21783 Maintainer: Gabe Black <gabeblack@google.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Tiago Mück <tiago.muck@arm.com> Tested-by: kokoro <noreply+kokoro@google.com>
2019-10-12arch,base: Separate the idea of a memory image and object file.Gabe Black
A memory image can be described by an object file, but an object file is more than a memory image. Also, it makes sense to manipulate a memory image to, for instance, change how it's loaded into memory. That takes on larger implications (relocations, the entry point, symbols, etc.) when talking about the whole object file, and also modifies aspects which may not need to change. For instance if an image needs to be loaded into memory at addresses different from what's in the object file, but other things like symbols need to stay unmodified. Change-Id: Ia360405ffb2c1c48e0cc201ac0a0764357996a54 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/21466 Tested-by: kokoro <noreply+kokoro@google.com> Reviewed-by: Brandon Potter <Brandon.Potter@amd.com> Maintainer: Gabe Black <gabeblack@google.com>
2019-10-10arch, base: Stop assuming object files have three segments.Gabe Black
The ObjectFile class has hardcoded assumptions that there are three segments, text, bss and data. There are some files which have one "segment" like raw files, where the entire file's contents are considered a single segment. There are also ELF files which can have an arbitrary number of segments, and those segments can hold any number of sections, including the text, data and/or bss sections. Removing this assumption frees up some object file formats from having to twist themselves to fit in that structure, possibly introducing ambiguities when some segments may fulfill multiple roles. Change-Id: I976e06a3a90ef852b17a6485e2595b006b2090d5 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/21463 Tested-by: kokoro <noreply+kokoro@google.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Gabe Black <gabeblack@google.com>
2019-10-09base: Rename Section to Segment, and some of its members.Gabe Black
ELF is, in my opinion, the most important object file format gem5 currently understands, and in ELF terminolgy the blob of data that needs to be loaded into memory to a particular location is called a segment. A section is a software level view of what's in a region of memory, and a single segment may contain multiple sections which happen to follow each other in memory. Change-Id: Ib810c5050723d5a96bd7550515b08ac695fb1b02 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/21462 Tested-by: kokoro <noreply+kokoro@google.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Gabe Black <gabeblack@google.com>
2019-10-03sim-se: Fix invalid delete of params on cloneJason Lowe-Power
The params pointer is kept by the SimObject and should not be deleted until gem5 exits. Added a to do to remember this object is leaked. Change-Id: I46cc23a09e4e9b6bc2fdcd961148324c41820815 Signed-off-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/18068 Tested-by: kokoro <noreply+kokoro@google.com> Maintainer: Brandon Potter <Brandon.Potter@amd.com> Reviewed-by: Brandon Potter <Brandon.Potter@amd.com>
2019-10-02sim: Mark System::getThreadContext method as constGiacomo Travaglini
Change-Id: Ic0ce1b098cfe0ce6ea37986a8a55002a5c18a66c Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/21304 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Jason Lowe-Power <jason@lowepower.com> Tested-by: kokoro <noreply+kokoro@google.com>
2019-09-26sim: Convert power modelling framework to new-style statsAndreas Sandberg
Change-Id: I1dd3ea3d37bb4464637222aa5bc5d88cc7d9b66a Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/21143 Tested-by: kokoro <noreply+kokoro@google.com> Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
2019-08-29stats: Add support for hierarchical statsAndreas Sandberg
This change makes the stat system aware of the hierarchical nature of stats. The aim is to achieve the following goals: * Make the SimObject hierarchy explicit in the stat system (i.e., get rid of name() + ".foo"). This makes stat naming less fragile and makes it possible to implement hierarchical formats like XML/HDF5/JSON in a clean way. * Make it more convenient to split stats into a separate struct/class that can be bound to a SimObject. This makes the namespace cleaner and makes stat accesses a bit more obvious. * Make it possible to build groups of stats in C++ that can be used in subcomponents in a SimObject (similar to what we do for checkpoint sections). This makes it easier to structure large components. * Enable partial stat dumps. Some of our internal users have been asking for this since a full stat dump can be large. * Enable better stat access from Python. This changeset implements solves the first three points by introducing a class (Stats::Group) that owns statistics belonging to the same object. SimObjects inherit from Stats::Group since they typically have statistics. New-style statistics need to be associated with a parent group at instantiation time. Instantiation typically sets the name and the description, other parameters need to be set by overriding Group::regStats() just like with legacy stats. Simple objects with scalar stats can typically avoid implementing regStats() altogether since the stat name and description are both specified in the constructor. For convenience reasons, statistics groups can be merged into other groups. This means that a SimObject can create a stat struct that inherits from Stats::Group and merge it into the parent group (SimObject). This can make the code cleaner since statistics tracking gets grouped into a single object. Stat visitors have a new API to expose the group structure. The Output::beginGroup(name) method is called at the beginning of a group and the Output::endGroup() method is called when all stats, and sub-groups, have been visited. Flat formats (e.g., the text format) typically need to maintain a stack to track the full path to a stat. Legacy, flat, statistics are still supported after applying this change. These stats don't belong to any group and stat visitors will not see a Output::beginGroup(name) call before their corresponding Output::visit() methods are called. Change-Id: I9025d61dfadeabcc8ecf30813ab2060def455648 Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/19368 Tested-by: kokoro <noreply+kokoro@google.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
2019-08-27sim: Add a << overload for the Port class which prints its name.Gabe Black
This makes it easier/less verbose to print the name of a port, it's most important and identifying feature, in a DPRINTF or other stream based output. Change-Id: I050d102844612577f9a83d550e619736507a6781 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20234 Tested-by: kokoro <noreply+kokoro@google.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2019-08-27sim: Add a takeOverFrom method to the base Port class.Gabe Black
This makes it easier, safer, and less verbose to swap out ports when a CPU takes over for another CPU, for instance. Change-Id: Ice08e4dcb4b04dc66b1841331092a78b4f6f5a96 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20233 Tested-by: kokoro <noreply+kokoro@google.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Gabe Black <gabeblack@google.com>
2019-08-27mem, sim, systemc: Reorganize Port and co.s bind, unbind slightly.Gabe Black
The base Port class can keep track of its peer, and also whether it's connected. This is partially delegated away from the port subclasses which still keep track of a cast version of their peer pointer for their own conveneince, so that it can be used by generic code. Even with the Port mechanism's new flexibility, each port still has exactly one peer and is either connected or not based on whether there is a peer currently. Change-Id: Id3228617dd1604d196814254a1aadeac5ade7cde Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20232 Tested-by: kokoro <noreply+kokoro@google.com> Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Gabe Black <gabeblack@google.com>
2019-08-13sim: Add a hook Clocked objects can implement for frequency changes.Gabe Black
This hook will let them implement whatever additional behavior is necessary for when the clock changes. An alternative design for this might have made the "update" function virtual, and required anyone overriding it to call into the base class. I think that would be an inferior design for two reasons. First, the subclass author might forget to call update. Second, while it might *seem* like this would have some performance benefit since you wouldn't call into the virtual function and then call update, incurring the function call overhead twice, you're going to call into update once regardless, and then you're either going to call the virtual funciton which does nothing (the norm) or does something. In either case you call the same functions the same number of times. There may be a slight penalty in code size since the call to update may be inlined in the call sights before the virtual function, and there will almost certainly be more of those than there would be implementations of the virtual function, but that should be negligable when compared to gem5's size as a whole. Change-Id: Id25a5359f2b1f7e42c6d1dcbc70a37d3ce092d38 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20089 Tested-by: kokoro <noreply+kokoro@google.com> Reviewed-by: Chun-Chen TK Hsu <chunchenhsu@google.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Anthony Gutierrez <anthony.gutierrez@amd.com> Reviewed-by: Srikant Bharadwaj <srikant.bharadwaj@amd.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2019-08-13sim: Clean up some mild style bugs in clocked_object.hh.Gabe Black
Clean up some formatting, and also remove redundant inline keywords. A function defined in place in a class definition is already automatically inline. Change-Id: Iaad3a8dda6498c6a6068c2aabc9d6eb11f3d2eb2 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20088 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Jason Lowe-Power <jason@lowepower.com> Tested-by: kokoro <noreply+kokoro@google.com>
2019-08-12sim-se: rename Process::setpgid memberBrandon Potter
The getter methods to access these types of members do not have a 'get' string in the method names. To make the interface a bit more consistent, remove the 'set' part of the member name. Change-Id: I04c56bd9d9feb1cf68ff50a1152083ea57ea7c62 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20008 Reviewed-by: Anthony Gutierrez <anthony.gutierrez@amd.com> Maintainer: Brandon Potter <Brandon.Potter@amd.com> Tested-by: kokoro <noreply+kokoro@google.com>
2019-08-09sim-se: minor refactor for ProcessParams::createBrandon Potter
Remove the nullptr initialization and change the message for object file failure. Change-Id: I14b80b47b65893c55810e7f715c1b8fc643c5125 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/19949 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Jason Lowe-Power <jason@lowepower.com> Tested-by: kokoro <noreply+kokoro@google.com>
2019-08-09sim-se: remove unused parameterBrandon Potter
The init function which processes invoke on their page tables has a thread context pointer parameter. The parameter is not used by the code so remove it. Change-Id: Ic4766fbc105d81c1c9ee4b5c0f428497dff2ab30 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/19948 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Jason Lowe-Power <jason@lowepower.com> Tested-by: kokoro <noreply+kokoro@google.com>
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