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2019-10-12arch,base: Separate the idea of a memory image and object file.Gabe Black
A memory image can be described by an object file, but an object file is more than a memory image. Also, it makes sense to manipulate a memory image to, for instance, change how it's loaded into memory. That takes on larger implications (relocations, the entry point, symbols, etc.) when talking about the whole object file, and also modifies aspects which may not need to change. For instance if an image needs to be loaded into memory at addresses different from what's in the object file, but other things like symbols need to stay unmodified. Change-Id: Ia360405ffb2c1c48e0cc201ac0a0764357996a54 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/21466 Tested-by: kokoro <noreply+kokoro@google.com> Reviewed-by: Brandon Potter <Brandon.Potter@amd.com> Maintainer: Gabe Black <gabeblack@google.com>
2019-10-10arch, base: Stop assuming object files have three segments.Gabe Black
The ObjectFile class has hardcoded assumptions that there are three segments, text, bss and data. There are some files which have one "segment" like raw files, where the entire file's contents are considered a single segment. There are also ELF files which can have an arbitrary number of segments, and those segments can hold any number of sections, including the text, data and/or bss sections. Removing this assumption frees up some object file formats from having to twist themselves to fit in that structure, possibly introducing ambiguities when some segments may fulfill multiple roles. Change-Id: I976e06a3a90ef852b17a6485e2595b006b2090d5 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/21463 Tested-by: kokoro <noreply+kokoro@google.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Gabe Black <gabeblack@google.com>
2019-10-09base: Rename Section to Segment, and some of its members.Gabe Black
ELF is, in my opinion, the most important object file format gem5 currently understands, and in ELF terminolgy the blob of data that needs to be loaded into memory to a particular location is called a segment. A section is a software level view of what's in a region of memory, and a single segment may contain multiple sections which happen to follow each other in memory. Change-Id: Ib810c5050723d5a96bd7550515b08ac695fb1b02 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/21462 Tested-by: kokoro <noreply+kokoro@google.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Gabe Black <gabeblack@google.com>
2019-10-03sim-se: Fix invalid delete of params on cloneJason Lowe-Power
The params pointer is kept by the SimObject and should not be deleted until gem5 exits. Added a to do to remember this object is leaked. Change-Id: I46cc23a09e4e9b6bc2fdcd961148324c41820815 Signed-off-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/18068 Tested-by: kokoro <noreply+kokoro@google.com> Maintainer: Brandon Potter <Brandon.Potter@amd.com> Reviewed-by: Brandon Potter <Brandon.Potter@amd.com>
2019-10-02sim: Mark System::getThreadContext method as constGiacomo Travaglini
Change-Id: Ic0ce1b098cfe0ce6ea37986a8a55002a5c18a66c Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/21304 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Jason Lowe-Power <jason@lowepower.com> Tested-by: kokoro <noreply+kokoro@google.com>
2019-09-26sim: Convert power modelling framework to new-style statsAndreas Sandberg
Change-Id: I1dd3ea3d37bb4464637222aa5bc5d88cc7d9b66a Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/21143 Tested-by: kokoro <noreply+kokoro@google.com> Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
2019-08-29stats: Add support for hierarchical statsAndreas Sandberg
This change makes the stat system aware of the hierarchical nature of stats. The aim is to achieve the following goals: * Make the SimObject hierarchy explicit in the stat system (i.e., get rid of name() + ".foo"). This makes stat naming less fragile and makes it possible to implement hierarchical formats like XML/HDF5/JSON in a clean way. * Make it more convenient to split stats into a separate struct/class that can be bound to a SimObject. This makes the namespace cleaner and makes stat accesses a bit more obvious. * Make it possible to build groups of stats in C++ that can be used in subcomponents in a SimObject (similar to what we do for checkpoint sections). This makes it easier to structure large components. * Enable partial stat dumps. Some of our internal users have been asking for this since a full stat dump can be large. * Enable better stat access from Python. This changeset implements solves the first three points by introducing a class (Stats::Group) that owns statistics belonging to the same object. SimObjects inherit from Stats::Group since they typically have statistics. New-style statistics need to be associated with a parent group at instantiation time. Instantiation typically sets the name and the description, other parameters need to be set by overriding Group::regStats() just like with legacy stats. Simple objects with scalar stats can typically avoid implementing regStats() altogether since the stat name and description are both specified in the constructor. For convenience reasons, statistics groups can be merged into other groups. This means that a SimObject can create a stat struct that inherits from Stats::Group and merge it into the parent group (SimObject). This can make the code cleaner since statistics tracking gets grouped into a single object. Stat visitors have a new API to expose the group structure. The Output::beginGroup(name) method is called at the beginning of a group and the Output::endGroup() method is called when all stats, and sub-groups, have been visited. Flat formats (e.g., the text format) typically need to maintain a stack to track the full path to a stat. Legacy, flat, statistics are still supported after applying this change. These stats don't belong to any group and stat visitors will not see a Output::beginGroup(name) call before their corresponding Output::visit() methods are called. Change-Id: I9025d61dfadeabcc8ecf30813ab2060def455648 Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/19368 Tested-by: kokoro <noreply+kokoro@google.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
2019-08-27sim: Add a << overload for the Port class which prints its name.Gabe Black
This makes it easier/less verbose to print the name of a port, it's most important and identifying feature, in a DPRINTF or other stream based output. Change-Id: I050d102844612577f9a83d550e619736507a6781 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20234 Tested-by: kokoro <noreply+kokoro@google.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2019-08-27sim: Add a takeOverFrom method to the base Port class.Gabe Black
This makes it easier, safer, and less verbose to swap out ports when a CPU takes over for another CPU, for instance. Change-Id: Ice08e4dcb4b04dc66b1841331092a78b4f6f5a96 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20233 Tested-by: kokoro <noreply+kokoro@google.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Gabe Black <gabeblack@google.com>
2019-08-27mem, sim, systemc: Reorganize Port and co.s bind, unbind slightly.Gabe Black
The base Port class can keep track of its peer, and also whether it's connected. This is partially delegated away from the port subclasses which still keep track of a cast version of their peer pointer for their own conveneince, so that it can be used by generic code. Even with the Port mechanism's new flexibility, each port still has exactly one peer and is either connected or not based on whether there is a peer currently. Change-Id: Id3228617dd1604d196814254a1aadeac5ade7cde Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20232 Tested-by: kokoro <noreply+kokoro@google.com> Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Gabe Black <gabeblack@google.com>
2019-08-13sim: Add a hook Clocked objects can implement for frequency changes.Gabe Black
This hook will let them implement whatever additional behavior is necessary for when the clock changes. An alternative design for this might have made the "update" function virtual, and required anyone overriding it to call into the base class. I think that would be an inferior design for two reasons. First, the subclass author might forget to call update. Second, while it might *seem* like this would have some performance benefit since you wouldn't call into the virtual function and then call update, incurring the function call overhead twice, you're going to call into update once regardless, and then you're either going to call the virtual funciton which does nothing (the norm) or does something. In either case you call the same functions the same number of times. There may be a slight penalty in code size since the call to update may be inlined in the call sights before the virtual function, and there will almost certainly be more of those than there would be implementations of the virtual function, but that should be negligable when compared to gem5's size as a whole. Change-Id: Id25a5359f2b1f7e42c6d1dcbc70a37d3ce092d38 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20089 Tested-by: kokoro <noreply+kokoro@google.com> Reviewed-by: Chun-Chen TK Hsu <chunchenhsu@google.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Anthony Gutierrez <anthony.gutierrez@amd.com> Reviewed-by: Srikant Bharadwaj <srikant.bharadwaj@amd.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2019-08-13sim: Clean up some mild style bugs in clocked_object.hh.Gabe Black
Clean up some formatting, and also remove redundant inline keywords. A function defined in place in a class definition is already automatically inline. Change-Id: Iaad3a8dda6498c6a6068c2aabc9d6eb11f3d2eb2 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20088 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Jason Lowe-Power <jason@lowepower.com> Tested-by: kokoro <noreply+kokoro@google.com>
2019-08-12sim-se: rename Process::setpgid memberBrandon Potter
The getter methods to access these types of members do not have a 'get' string in the method names. To make the interface a bit more consistent, remove the 'set' part of the member name. Change-Id: I04c56bd9d9feb1cf68ff50a1152083ea57ea7c62 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20008 Reviewed-by: Anthony Gutierrez <anthony.gutierrez@amd.com> Maintainer: Brandon Potter <Brandon.Potter@amd.com> Tested-by: kokoro <noreply+kokoro@google.com>
2019-08-09sim-se: minor refactor for ProcessParams::createBrandon Potter
Remove the nullptr initialization and change the message for object file failure. Change-Id: I14b80b47b65893c55810e7f715c1b8fc643c5125 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/19949 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Jason Lowe-Power <jason@lowepower.com> Tested-by: kokoro <noreply+kokoro@google.com>
2019-08-09sim-se: remove unused parameterBrandon Potter
The init function which processes invoke on their page tables has a thread context pointer parameter. The parameter is not used by the code so remove it. Change-Id: Ic4766fbc105d81c1c9ee4b5c0f428497dff2ab30 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/19948 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Jason Lowe-Power <jason@lowepower.com> Tested-by: kokoro <noreply+kokoro@google.com>
2019-08-06sim-se: add new getpgrp system callBrandon Potter
This changeset adds new (relatively simple) system call support. The getpgrp call returns a thread context's pgid. Change-Id: I361bdbfb9c01b761ddd5a4923d23f86971f8d614 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/17111 Maintainer: Brandon Potter <Brandon.Potter@amd.com> Tested-by: kokoro <noreply+kokoro@google.com> Reviewed-by: Ayaz Akram <yazakram@ucdavis.edu>
2019-08-06sim-se: adding pipe2 syscallMatthew Sinclair
pipe2 builds on top of the pipe syscall implementation by adding some extra flags for the files (to avoid have to make separate calls to fcntl). Change-Id: I88cf6f1387b9d14e60b33a32db412da9ed93a3e6 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/12310 Reviewed-by: Brandon Potter <Brandon.Potter@amd.com> Maintainer: Brandon Potter <Brandon.Potter@amd.com> Tested-by: kokoro <noreply+kokoro@google.com>
2019-08-02sim-se: small refactor on pipe syscallBrandon Potter
Change-Id: I02ffb1c4af980554ff12ac7d11d32ba80fe261c5 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/12308 Reviewed-by: Brandon Potter <Brandon.Potter@amd.com> Maintainer: Brandon Potter <Brandon.Potter@amd.com> Tested-by: kokoro <noreply+kokoro@google.com>
2019-08-01sim-se: small performance optimizationBrandon Potter
A local variable was being set inside a loop when it should have been set outside the loop. This changeset moves the variable to the appropriate place. Change-Id: If7655b501bd819c39d35dea4c316b4b9ed3173a2 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/17108 Maintainer: Brandon Potter <Brandon.Potter@amd.com> Tested-by: kokoro <noreply+kokoro@google.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
2019-08-01sim-se: fstat64 bugfixBrandon Potter
The fstat64 system call does an upcast on entries in the file descriptor array to check if the file descriptor has a backing host-filesystem file opened. It does so because it needs to pass the host fd into the fstat call (since we rely on the host filesystem to service filesystem system calls). The upcast was overly specific. This changeset alters the system call to use the most general base class of the file descriptor entries that can satisfy the code. Change-Id: I10daf820257cea4d678ee6917e01e9cc9cd1cf5e Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/17110 Tested-by: kokoro <noreply+kokoro@google.com> Maintainer: Brandon Potter <Brandon.Potter@amd.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
2019-08-01sim-se: add new option to getrlimit syscallBrandon Potter
The NPROC option was not serviced by the getrlimit syscall. This changeset adds in the necessary code to service the option. Change-Id: I679d3949c3bbb0628188f4e33034028d7726fdcb Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/17109 Maintainer: Brandon Potter <Brandon.Potter@amd.com> Tested-by: kokoro <noreply+kokoro@google.com> Reviewed-by: Matt Sinclair <mattdsinclair@gmail.com>
2019-07-18sim: Add getter to fault virtual addressGabor Dozsa
Change-Id: Ifd493aee9e78b0b4ddcc71e90f48679543acb861 Signed-off-by: Giacomo Gabrielli <giacomo.gabrielli@arm.com> Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/19176 Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com> Tested-by: kokoro <noreply+kokoro@google.com>
2019-05-30arch, base, cpu, gpu, sim: Merge getMemProxy and getVirtProxy.Gabe Black
These two functions were performing the same function but had two different names for historical reasons. This change merges them together, keeping the getVirtProxy name to be consistent with the getPhysProxy method used to get a non-translating proxy port. Change-Id: Idd83c6b899f9343795075b030ccbc723a79e52a4 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/18581 Tested-by: kokoro <noreply+kokoro@google.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2019-05-30cpu, sim: Return PortProxy &s from all the proxy accessors.Gabe Black
This is a step towards merging the accessors for SE and FS modes. Change-Id: I76818ab88b97097ac363e243be9cc1911b283090 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/18579 Tested-by: kokoro <noreply+kokoro@google.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Brandon Potter <Brandon.Potter@amd.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2019-05-30arch, base, sim: Demote (SE|FS)TranslatingPortProxy &s to PortProxy &s.Gabe Black
Al(most) all of the interesting differences between the two classes have been removed. There are some control methods which are still specific to each type which may require treating them as their true type, but most code that consumes them doesn't need to worry about which is which. Change-Id: Ie592676f1e496c7940605b66e55cd7fae18e59d6 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/18577 Tested-by: kokoro <noreply+kokoro@google.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Brandon Potter <Brandon.Potter@amd.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2019-05-30arch, base, sim: Replace Copy(String)?(In|Out) with equivalent code.Gabe Black
This expands those functions into code which extracts the virt proxy and then uses the appropriate method on it. This has two benefits. First, the Copy* functions where mostly redundant wrappers around the methods the proxy port already had. Second, using them forced a particular port which might not actually be what the user wanted. Change-Id: I62084631dd080061e3c74997125164f40da2d77c Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/18575 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Jason Lowe-Power <jason@lowepower.com> Tested-by: kokoro <noreply+kokoro@google.com>
2019-05-29sim-se: add a release parameter to Process.pyCiro Santilli
Set the default release to that single value for all ISAs. glibc has checks for the kernel version based on uname, and refuses to start any syscall emulation programs if those checks don't pass with error: FATAL: kernel too old The ideal solution to this problem is to actually implement all missing system calls for the required kernel version and bumping the release accordingly. However, it is very hard to implement all missing syscalls and verify compliance. Previously, we have simply bumped the version manually from time to time when major glibc versions started breaking. This commit alleviates the problem in two ways. Firstly, having a single kernel version for all versions means that it is easier to bump all versions at once. Secondly, it makes it is possible to set the release with a parameter, which in turn can be set from the command line with: se.py --param 'system.cpu[:].workload[:].release = "4.18.0"' Change-Id: I9e3c31073bfe68735f7b0775c8e299aa62b98222 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/17849 Maintainer: Brandon Potter <Brandon.Potter@amd.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Tested-by: kokoro <noreply+kokoro@google.com>
2019-05-29arch, base, dev, sim: Remove now unnecessary casts from PortProxy methods.Gabe Black
Change-Id: Ia73b2d86a10d02fa09c924a4571477bb5f200eb7 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/18572 Tested-by: kokoro <noreply+kokoro@google.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Jason Lowe-Power <jason@lowepower.com>
2019-05-21sim-se: change syscall function signatureBrandon Potter
The system calls had four parameters. One of the parameters is ThreadContext and another is Process. The ThreadContext holds the value of the current process so the Process parameter is redundant since the system call functions already have indirect access. With the old API, it is possible to call into the functions with the wrong supplied Process which could end up being a confusing error. This patch removes the redundancy by forcing access through the ThreadContext field within each system call. Change-Id: Ib43d3f65824f6d425260dfd9f67de1892b6e8b7c Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/12299 Reviewed-by: Brandon Potter <Brandon.Potter@amd.com> Maintainer: Brandon Potter <Brandon.Potter@amd.com> Tested-by: kokoro <noreply+kokoro@google.com>
2019-05-21sim-se: remove /sys from special pathsTony Gutierrez
Currently, the open system call implementation in SE mode treats /sys/ as a special path that is opened using a special open handler. The ROC runtime, however, reads several files in /sys/ that are supported via path redirection. Here we remove /sys/ from the special files so that the necessary files may be read via path redirection. Change-Id: Ifdab38ea1e6cc486ad43aec96b6e032fe63f137d Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/12127 Reviewed-by: Anthony Gutierrez <anthony.gutierrez@amd.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Anthony Gutierrez <anthony.gutierrez@amd.com> Tested-by: kokoro <noreply+kokoro@google.com>
2019-05-20sim: Make the Process create function use the object loader mechanism.Gabe Black
This gets rid of the big mass of #if-s around headers and around the code which creates an object file. As a nice side bonus, this also means that in addition to supporting multiple OS/arch combinations simultaneously, the object file loader could support multiple ISAs simultaneously as well, since each could load and set up its object file loaders indepedently and without the base process classes knowledge/involvement. Change-Id: I0a19ad06e30e9062a96d27f00b66756eb3a595ba Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/18631 Tested-by: kokoro <noreply+kokoro@google.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2019-05-18arch, base, cpu, dev, mem, sim: Remove #if 0-ed out code.Gabe Black
This code will be preserved through version control, but otherwise creates clutter and will rot in place since it's never compiled. Change-Id: Id265f6deac445116843956ea5cf1210d8127274e Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/18608 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Brandon Potter <Brandon.Potter@amd.com> Maintainer: Jason Lowe-Power <jason@lowepower.com> Tested-by: kokoro <noreply+kokoro@google.com>
2019-05-06sim-se: correct statfs inclusion on !linux hostAndrea Mondelli
- Added missing header - Fixed typo on __linux__ macro conditional - s/ifdef/if defined/g for consistency Change-Id: I83b69856e5ec8b23b707642c0e14216cf62db31e Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/18668 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Brandon Potter <Brandon.Potter@amd.com> Maintainer: Jason Lowe-Power <jason@lowepower.com> Tested-by: kokoro <noreply+kokoro@google.com>
2019-05-03sim-se: fix a few bugs/warns from GCC 6Joe Gross
Change-Id: Ib2ad860324fd234b23262d141be3e82628ff61f0 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/12126 Tested-by: kokoro <noreply+kokoro@google.com> Reviewed-by: Brandon Potter <Brandon.Potter@amd.com> Maintainer: Brandon Potter <Brandon.Potter@amd.com>
2019-05-03sim-se: add eventfd system callBrandon Potter
Change-Id: I7aeb4fe808d0c8f2fb8041e3662d330d8458f09c Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/12125 Tested-by: kokoro <noreply+kokoro@google.com> Reviewed-by: Ciro Santilli <ciro.santilli@arm.com> Maintainer: Brandon Potter <Brandon.Potter@amd.com>
2019-04-30sim-se: use DPRINTF_SYSCALL for ioctl/wait4Alexandru Dutu
Change-Id: I4fbaf1a0653f13ae964a2574cc26bbaac2dc0686 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/12124 Maintainer: Brandon Potter <Brandon.Potter@amd.com> Tested-by: kokoro <noreply+kokoro@google.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
2019-04-30sim-se: bugfix for 54c77aa055eBrandon Potter
54c77aa055e introduced a bug which manifests as cyclical dependency on a member initialization for the Process class. The current working directory (cwd) parameter is passed into Process to initialize both the target and host versions of the cwd. (The target and host versions may differ if the faux filesystem is used.) The host cwd init invoked methods which rely on the host cwd already being initialized. To avoid the bug, the code will now rely on using the targets cwd version, but will issue checks against the redirect paths. Change-Id: I4ab644a3e00737dbf249f5d6faf20a26ceb04248 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/18448 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Jason Lowe-Power <jason@lowepower.com> Tested-by: kokoro <noreply+kokoro@google.com>
2019-04-30arch: cpu: Track kernel stats using the base ISA agnostic type.Gabe Black
Then cast to the ISA specific type when necessary. This removes (mostly) an ISA specific aspect to some of the interfaces. The ISA specific version of the kernel stats still needs to be constructed and stored in a few places which means that kernel_stats.hh still needs to be a switching arch header, for instance. In the future, I'd like to make the kernel its own object like the Process objects in SE mode, and then it would be able to instantiate and maintain its own stats. Change-Id: I8309d49019124f6bea1482aaea5b5b34e8c97433 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/18429 Tested-by: kokoro <noreply+kokoro@google.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2019-04-30sim-se: add socket ioctlsBrandon Potter
The OpenMPI 1.8.2 runtime needs the ioctl code included in this patch to issue socket operations on the host machine. Change-Id: I687b31f375a846f0bab2debd9b9472605a4d2c7d Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/12123 Tested-by: kokoro <noreply+kokoro@google.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Jason Lowe-Power <jason@lowepower.com>
2019-04-29sim-se: create Proc out files in out dirSteve Reinhardt
Redirected output files from Process objects were being created in the current directory instead of in the output directory. Change-Id: Ieb6ab5556fbcc811f4f24910da247d4dcdbc71bd Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/12122 Reviewed-by: Brandon Potter <Brandon.Potter@amd.com> Maintainer: Brandon Potter <Brandon.Potter@amd.com> Tested-by: kokoro <noreply+kokoro@google.com>
2019-04-28arch, sim: Simplify the AuxVector type.Gabe Black
The AuxVector type has a bunch of accessors which just give access to the underlying variables through references. We might as well just make those members accessible directly. Also, the AuxVector doesn't need to handle endianness flips itself. We can tell the byteswap mechanism how to flip an AuxVector, and let it handle that for us. This gets rid of the entire .cc file which was complicated by trying to both hide the ISA specific endianness translations, and instantiate templated functions in a .cc. Change-Id: I433cd61e73e0b067b6d628fba31be4a4ec1c4cf0 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/18373 Maintainer: Gabe Black <gabeblack@google.com> Tested-by: kokoro <noreply+kokoro@google.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
2019-04-28mem: Remove the ISA specialized versions of port proxy's read/write.Gabe Black
These selected their behavior based on ifdefs and had to be disabled when on the NULL ISA. The versions which take an explicit endianness have been renamed to just read/write instead of readGtoH and writeHtoG since the direction of the translation is obvious from context. Change-Id: I6cfbfda6c4481962d442d3370534e50532d41814 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/18372 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com> Tested-by: kokoro <noreply+kokoro@google.com>
2019-04-28mem: Minimize the use of MemObject.Gabe Black
MemObject doesn't provide anything beyond its base ClockedObject any more, so this change removes it from most inheritance hierarchies. Occasionally MemObject is replaced with SimObject when I was fairly confident that the extra functionality of ClockedObject wasn't needed. Change-Id: Ic014ab61e56402e62548e8c831eb16e26523fdce Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/18289 Tested-by: kokoro <noreply+kokoro@google.com> Reviewed-by: Anthony Gutierrez <anthony.gutierrez@amd.com> Maintainer: Gabe Black <gabeblack@google.com>
2019-04-25sim-se: add a faux-filesystemDavid Hashe
This change introduces the concept of a faux-filesystem. The faux-filesystem creates a directory structure in m5out (or whatever output dir the user specifies) where system calls may be redirected. This is useful to avoid non-determinism when reading files with varying path names (e.g., variations from run-to-run if the simulation is scheduled on a cluster where paths may change). Also, this changeset allows circumventing host pseudofiles which have information specific to the host processor (such as cache hierarchy or processor information). Bypassing host pseudofiles can be useful when executing runtimes in the absence of an operating system kernel since runtimes may try to query standard files (i.e. /proc or /sys) which are not relevant to an application executing in syscall emulation mode. Change-Id: I90821b3b403168b904a662fa98b85def1628621c Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/12119 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Jason Lowe-Power <jason@lowepower.com> Tested-by: kokoro <noreply+kokoro@google.com>
2019-04-22sim-se: Enhance clone for X86KvmCPUAlexandru Dutu
This changeset enables clone to work with X86KvmCPU model, which will allow running multi-threaded applications at near hardware speeds. Even though the application is multi-threaded, the KvmCPU model uses one event queue, therefore, only one hardware thread will be used, through KVM, to simulate multiple application threads. Change-Id: I2b2a7b1edb1c56eeb9c4fa0553cd236029cd53f8 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/18268 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Jason Lowe-Power <jason@lowepower.com> Tested-by: kokoro <noreply+kokoro@google.com>
2019-03-19arch, cpu, dev, gpu, mem, sim, python: start using getPort.Gabe Black
Replace the getMasterPort, getSlavePort, and getEthPort functions with getPort, and remove extraneous mechanisms that are no longer necessary. Change-Id: Iab7e3c02d2f3a0cf33e7e824e18c28646b5bc318 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/17040 Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2019-03-19mem: Move bind() and unbind() into the Port class.Gabe Black
These are now pure virtual methods which more specialized port subclasses will need to implement. The SlavePort class implements them by ignoring them and then providing parallel functions for the MasterPort to call. The MasterPort's methods do basically what they did before, except now bind() uses dynamic cast to check if its peer is of the appropriate type and also to convert it into that type before connecting to it. Change-Id: I0948799bc954acaebf371e6b6612cee1d3023bc4 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/17038 Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2019-03-19sim: Add a getPort function to SimObject.Gabe Black
This will retrieve a Port object from a given SimObject (which might not be a MemObject) no matter what flavor of Port it is. Change-Id: I636b85e9d4929a05a769e165849106bcb5f3e9c1 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/17037 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2019-03-15mem: Move the Port base class into sim.Gabe Black
The Port class is going to be officially used for more than just memory system connections. Change-Id: I493e721f99051865c5f0c06946a2303ff723c2af Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/17036 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2019-03-12sim: Add size to array unserialization error messageDaniel R. Carvalho
Add both acquired and expected size information to array unserialization error message. Change-Id: Ic0a493c5a7860066eb992e9e91e7a4746b197579 Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br> Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/16542 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Jason Lowe-Power <jason@lowepower.com>