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2007-03-23Make hardware loads/stores serializing; they need to avoid certain ↵Kevin Lim
out-of-order interactions in the 21264. --HG-- extra : convert_revision : d83940af7d0e8efe891d574ac42c6d70d179e2b1
2007-03-23Updates for commit.Kevin Lim
1. Move interrupt handling to a separate function to clean up main commit() function a bit. Also gate the function call off properly based on whether or not there are outstanding interrupts, and the system is not in PAL mode. 2. Better handling of updating instruction's status bits. Instructions are not marked "atCommit" until other stages view it (pushed off to IEW/IQ), and they have been properly handled (faults). 3. Don't consider the ROB "empty" for the purpose of other stages until the ROB is empty, all stores have written back, and there was no store commits this cycle. The last is necessary in case a store committed, in which case it would look like all stores have written back but in actuality have not. src/cpu/o3/commit.hh: Slightly modify how interrupts are handled. Also include some extra bools to keep track of state properly. src/cpu/o3/commit_impl.hh: Slightly modify how interrupts are handled. Also include some extra bools to keep track of state. General correctness updates, most specifically for when commit broadcasts to other stages that the ROB is empty. --HG-- extra : convert_revision : 682ec6ccf4ee6ed0c8a030ceaba1c90a3619d102
2007-03-233 memory system fixes:Kevin Lim
1. Update packet's flags properly when a snoop happens 2. Don't allow accesses to read a block's data if the block has outstanding MSHRs. This avoids a RAW hazard in MP systems that the memory system was not detecting properly earlier (a write required a block to upgrade, and while the upgrade was outstanding, a read came along and read old data). 3. Update MSHR's request upon a response being handled. If the MSHR has more targets than it can respond to in one cycle, then its request must be properly updated to the new head of the targets list. src/mem/bus.cc: Update packet's flags properly upon snoop. src/mem/cache/cache_impl.hh: Be sure to not allow accesses to a block with outstanding MSHRs. src/mem/cache/miss/miss_queue.cc: Update MSHR's request upon a response being handled. --HG-- extra : convert_revision : 76a9abc610ca3f1904f075ad21637148a41982d6
2007-03-23Handle status bits a little better, as well as non-speculative instructions.Kevin Lim
src/cpu/o3/iew_impl.hh: Allow for slightly more flexible handling of non-speculative instructions. They can be other classes now, such as loads or stores. Also be sure to clear the state associated with squashes that are not used. i.e. if a squash due to a memory ordering violation happens on the same cycle as an older branch squashing, clear the state associated with the memory ordering violation. Lastly don't consider uncached loads to officially be "at commit" until IEW receives the signal back from commit about the load. src/cpu/o3/inst_queue_impl.hh: Don't consider non-speculative instructions to be "at commit" until the IQ has received a signal from commit about the instruction. This prevents non-speculative instructions from being issued too early. src/cpu/o3/mem_dep_unit_impl.hh: Clear instruction's ability to issue if it's replayed. --HG-- extra : convert_revision : d69dae878a30821222885485f4dee87170d56eb3
2007-03-23Two fixes:Kevin Lim
1. Requests are handled more properly now. They assume the memory system takes control of the request upon sending out an access. 2. load-load ordering is maintained. src/cpu/base_dyn_inst.hh: Update how requests are handled. The BaseDynInst should not be able to hold a pointer to the request because the request becomes owned by the memory system once it is sent out. Also include some functions to allow certain status bits to be cleared. src/cpu/base_dyn_inst_impl.hh: Update how requests are handled. The BaseDynInst should not be able to hold a pointer to the request because the request becomes owned by the memory system once it is sent out. src/cpu/o3/fetch_impl.hh: General correctness fixes. retryPkt is not necessarily always set, so handle it properly. Also consider the cache unblocked only when recvRetry is called. src/cpu/o3/lsq_unit.hh: Handle requests a little more correctly. Now that the requests aren't pointed to by the DynInst, be sure to delete the request if it's not being used by the memory system. Also be sure to not store-load forward from an uncacheable store. src/cpu/o3/lsq_unit_impl.hh: Check to make sure load-load ordering was maintained. Also handle requests a little more correctly. --HG-- extra : convert_revision : e86bead2886d02443cf77bf7a7a1492845e1690f
2007-03-23Set progress_interval in terms of CPU cycles.Kevin Lim
--HG-- extra : convert_revision : 76b0918276cb613eb314ab1479b5ffdb31f31dee
2007-03-23A couple of minor fixes.Kevin Lim
1. Set CPU ID in all modes for the O3 CPU. 2. Use nextCycle() function to prevent phase drift in O3 CPU. 3. Remove assertion in rename map that is no longer true. src/cpu/o3/alpha/cpu_builder.cc: Allow for CPU id in all modes, not just full system. Also include a parameter that was left out by accident. src/cpu/o3/alpha/cpu_impl.hh: Set the CPU ID properly. src/cpu/o3/cpu.cc: src/cpu/o3/cpu.hh: Use nextCycle() function so that the CPU does not get out of phase when starting up from quiesces. src/cpu/o3/rename_map.cc: Remove assertion that is no longer true. tests/configs/o3-timing.py: Set CPU's id to 0. --HG-- extra : convert_revision : 2b69c19adfce2adcc2d1939e89d702bd6674d5d5
2007-02-07Merge zizzer:/bk/newmemAli Saidi
into zeep.pool:/z/saidi/work/m5.newmem --HG-- extra : convert_revision : 60aabc4b93ef9d742f7e07363bd51f24170b85b8
2007-02-06Initialize the variable to something.Nathan Binkert
--HG-- extra : convert_revision : bfe1e70130719ff239987d725b089c6d7152c541
2007-02-06Include compiler.hh since we use some of the #definesNathan Binkert
--HG-- extra : convert_revision : 1040addcf3f52d8d9fed2930890dadf524205af9
2007-02-06merge my index fix and lisa's fixAli Saidi
--HG-- extra : convert_revision : 5f2c7d46c96fa061bbfb66edf188d405ca600020
2007-02-06Fix for LL/SC that Ron sent me.Kevin Lim
--HG-- extra : convert_revision : b3510a23d8a9eb466939f38491a109c3a65a7363
2007-02-06more fp fixesAli Saidi
fix unaligned accesses in mmaped disk device src/arch/sparc/isa/decoder.isa: get (ld|st)fsr ops working right. In reality the fp enable check needs to go higher up in the emitted code src/arch/sparc/isa/formats/basic.isa: move the cexec into the aexec field src/cpu/exetrace.cc: copy the exception state from legion when we get it wrong. We aren't going to get it right without an fp emulation layer src/dev/sparc/mm_disk.cc: src/dev/sparc/mm_disk.hh: fix unaligned accesses in the memory mapped disk device --HG-- extra : convert_revision : aaa33096b08cf0563fe291d984a87493a117e528
2007-02-02more sparc fixesAli Saidi
src/arch/sparc/isa/decoder.isa: fix rdgsr fault check src/arch/sparc/tlb.cc: block asis are now supported --HG-- extra : convert_revision : cf55d648d2c5184fab03b6fe057d0e33c1dfc393
2007-02-02make interrupt code serialize itself and fix indentingAli Saidi
--HG-- extra : convert_revision : d0bb23c7922568586b640084ac719e809cc8422f
2007-02-02fix mostly floating point relatedAli Saidi
src/arch/sparc/floatregfile.cc: fix fp read/writing to registers... looking for suggestions on cleaner ways if anyone has them src/arch/sparc/isa/decoder.isa: fix some fp implementations src/arch/sparc/isa/formats/basic.isa: add new fp op class that 0 cexec in fsr and sets rounding mode for the up comming op src/arch/sparc/isa/includes.isa: include the appropriate header files for the rounding code src/arch/sparc/miscregfile.cc: print fsr out when it's read/written and the Sparc traceflgas in on src/cpu/exetrace.cc: fix printing of float registers --HG-- extra : convert_revision : 49faab27f2e786a8455f9ca0f3f0132380c9d992
2007-02-01Merge zizzer:/bk/newmemLisa Hsu
into zed.eecs.umich.edu:/z/hsul/work/sparc/x86.m5 --HG-- extra : convert_revision : 62a0017a1147631513db7878f4e4d08fca776bc1
2007-02-01only increment numPosted if an interrupt of that type hasn't been posted before.Lisa Hsu
--HG-- extra : convert_revision : 6671c594b78d2e38449069157f39af96b81340f2
2007-01-31make sparc fs less chattyAli Saidi
src/SConscript: strip doesn't take a src and dest in solaris --HG-- extra : convert_revision : 57f95eda0e3232475a5b55753ace3f3f0fced8b3
2007-01-30Merge zizzer:/bk/newmemAli Saidi
into zeep.pool:/z/saidi/work/m5.newmem --HG-- extra : convert_revision : 276b640c5c5a51e88e9bd630960ad462d9f0cb8d
2007-01-30add fsr to the list of registers we are interested inAli Saidi
--HG-- extra : convert_revision : 2cc0d0144abab264aa0ec8c07242cdab2dffd4f8
2007-01-30Make SPARC checkpointing workAli Saidi
src/arch/sparc/floatregfile.cc: Fix serialization for fpreg src/arch/sparc/intregfile.cc: fix serialization for intreg src/arch/sparc/miscregfile.cc: fix serialization from miscreg src/arch/sparc/pagetable.cc: fix serialization for page table src/arch/sparc/regfile.cc: need to serialize nnpc src/arch/sparc/tlb.cc: write serialization code for tlb src/cpu/base.cc: provide a way to find the thread number a context is serialize the instruction counter src/cpu/base.hh: provide a way to find the thread number a context is and given a thread number find a context pointer src/cpu/cpuevent.hh: provide method to get thread context from a cpu event for serialization src/dev/sparc/t1000.cc: src/dev/sparc/t1000.hh: nothing to serialize in t1000 src/sim/serialize.cc: src/sim/serialize.hh: Make findObj() work (it hasn't since we did the python conversion stuff) --HG-- extra : convert_revision : a95bc4e3c3354304171efbe3797556fdb146bea2
2007-01-30Merge zizzer:/bk/newmemGabe Black
into zower.eecs.umich.edu:/eecshome/m5/newmem --HG-- extra : convert_revision : 7b332ee4c737206511d26db391117eb1fe5ea290
2007-01-30Implemented fbfss and fbpfcc instructions, and cleaned up branch code a little.Gabe Black
src/arch/sparc/isa/base.isa: Added passesFpCondition function to help with fbfcc and fbpfcc instructions. src/arch/sparc/isa/decoder.isa: Added fbfcc and fbpfcc instructions, and cleaned up branch code slightly. src/arch/sparc/isa/formats/branch.isa: Minor cleanup. --HG-- extra : convert_revision : 6586b46418f1f70bace41407f267fee30c657714
2007-01-30change std::isnan() to a using namespace std and isnan(). We need a better ↵Ali Saidi
way to do this. --HG-- extra : convert_revision : 4f59ca8e6425db23f57a1f3f65a4874e483d0ecc
2007-01-30use std:: for isnan() and fix decoding of fcmpe*Ali Saidi
--HG-- extra : convert_revision : 06be0f8572e26c3c7e761b482248304ce1afa038
2007-01-30sizeof with a pointer to dynamically allocated memory will return the size ↵Gabe Black
of the pointer, not the memory. --HG-- extra : convert_revision : 04647d9fa0c464960d37797717f8171862cf48f8
2007-01-30Make clearSingleStep in SPARC a warning, and rephrase the panic for ↵Gabe Black
setSingleStep --HG-- extra : convert_revision : fde27a1faa6c03a24a4321a153dfa89a438f9a32
2007-01-30Make the FpUnimpl format actually write the Fsr.Gabe Black
--HG-- extra : convert_revision : 84717cd3a8fa9fb85bd0693304e05ef475b05d07
2007-01-30Added FpUnimpl format for quad precision and other purposefully ↵Gabe Black
unimplemented floating point ops. --HG-- extra : convert_revision : 356fec86c35560b20ea8eee80844602bbcec145f
2007-01-29Merge zizzer:/bk/newmemGabe Black
into zower.eecs.umich.edu:/eecshome/m5/newmem --HG-- extra : convert_revision : 0e4a54c21f32fec13deaf00b5d61c258007f172b
2007-01-29Fix the Frs?s operands to use single width by default, rather than double width.Gabe Black
--HG-- extra : convert_revision : 36137ee025dc5c79665b041b43bd89505715ca70
2007-01-29Add implementation for the fcmp instructions. These don't behave -quite- ↵Gabe Black
right with respect to quite NaNs, but hopefully we don't need to worry about the distinction. --HG-- extra : convert_revision : 67b6583a20530b7a393aa04d0b71031d3c72ecdd
2007-01-29Fix the FCMPCC bitfield.Gabe Black
--HG-- extra : convert_revision : d2c538e7f469bd12a80eb8585c78d5325d6e6141
2007-01-29timegm() is a gnuism... replace with the code from the timegm() man pageAli Saidi
--HG-- extra : convert_revision : f2b80a0b7768edc370e3f07c45cb3bb9a46450a9
2007-01-29fix some over sights in moving windowing and ccr registers to int reg fileAli Saidi
--HG-- extra : convert_revision : 4e83e5163076aeef72ec5caf1e0d7adea11da875
2007-01-29Merge zizzer:/bk/newmemAli Saidi
into zeep.pool:/z/saidi/work/m5.newmem --HG-- extra : convert_revision : 7b8b791815d1fb51cc7ad085307a640b2ee51642
2007-01-29Cleaned up disassembly a little.Gabe Black
--HG-- extra : convert_revision : 4665ac7760c9b78a1d7699ceeb541b694211a947
2007-01-29A minor hack to get branch prediction to behave like before on Alpha.Gabe Black
--HG-- extra : convert_revision : 1eaabd13c72aa42c512a04d162a87491818bc621
2007-01-29Fixed a warning about an unused variable.Gabe Black
--HG-- extra : convert_revision : f9c78e86b60c3085cd95b1b4e132205e0ef584dd
2007-01-28Merge zizzer:/bk/newmemGabe Black
into zower.eecs.umich.edu:/eecshome/m5/newmem --HG-- extra : convert_revision : 7bea2cb13e2de527134d98d4ee21a55dc4a7d1ad
2007-01-28Merge zizzer:/bk/newmemAli Saidi
into zeep.pool:/z/saidi/work/m5.newmem --HG-- extra : convert_revision : e302dc4d7a20646bb0ea363127b2658a6d6e810c
2007-01-28Merge zizzer:/bk/newmemAli Saidi
into pb15.local:/Users/ali/work/m5.newmem.head --HG-- extra : convert_revision : b4db0b350c8a5b3452ede74e5b42eec8ed6685c3
2007-01-28make unimplemented ops failAli Saidi
return correct traps for ua2005 fpops that aren't implemented in hw --HG-- extra : convert_revision : 998fd43f77c5de7078bac1c6caab296b18c9366d
2007-01-28Merge zizzer:/bk/newmemAli Saidi
into zeep.pool:/z/saidi/work/m5.newmem --HG-- extra : convert_revision : f25fd4855a1eaaecb29e6ccc3cee22cf07e4108b
2007-01-28fix comparing fp registers between legion and m5Ali Saidi
make fp writes also chatty with the Sparc traceflag src/arch/sparc/floatregfile.cc: make fp writes also chatty with the Sparc traceflag src/cpu/exetrace.cc: fix comparing fp registers between legion and m5 --HG-- extra : convert_revision : f3703afae56249f137451262bc1b6919d465e714
2007-01-28Merge zizzer:/bk/newmemGabe Black
into zower.eecs.umich.edu:/eecshome/m5/newmem --HG-- extra : convert_revision : 2398e48722dd71ddf270e93bd7b387078fb30e6b
2007-01-28Stick the conversion of python to unix time with all ofNathan Binkert
the other param code so that other functions can use it as well. --HG-- extra : convert_revision : a8becdeadc70af0b64bff5b0770788dfba6e1857
2007-01-27I missed a couple of thingsAli Saidi
--HG-- extra : convert_revision : 2fa44718e381ff743fa1cf12f4db2221dca87e4c
2007-01-27While I'm waiting for legion to run make m5 compile with a few more compilersAli Saidi
SConstruct: src/SConscript: Add flags for Intel CC while i'm at it src/base/compiler.hh: the _Pragma stuff needst to be called this way unless someone happens to have a cleaner way src/base/cprintf_formats.hh: add std:: where appropriate src/base/statistics.hh: use this->map since icc was getting confused about std::map vs the locally defined map src/cpu/static_inst.hh: Add some more dummy returns where needed src/mem/packet.hh: add more dummy returns where needed src/sim/host.hh: use limits to come up with max tick --HG-- extra : convert_revision : 08e9f7898b29fb9d063136529afb9b6abceab60c
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