Age | Commit message (Collapse) | Author |
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into vm1.(none):/home/stever/bk/newmem-cache2
src/base/traceflags.py:
Hand merge.
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extra : convert_revision : 9e7539eeab4220ed7a7237457a8f336f79216924
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src/cpu/memtest/memtest.cc:
Need to set packet source field so that response from cache
doesn't run into assertion failure when copying source to dest.
src/mem/packet.hh:
Copy source field when copying packets.
Assert that source is valid before copying it to dest
when turning packets around.
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extra : convert_revision : 09e3cfda424aa89fe170e21e955b295746832bf8
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ControlBitfieldOPerand to ISA Parser. Now, while things do build, we have to fix broken functionality...
src/arch/isa_parser.py:
add back deleted writeback in Control Operand
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extra : convert_revision : dba11af220a1281fa53f79d87e4f8752bdfc56db
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extra : convert_revision : 31e7243c8820cb9f6744c53c417460dee9adaf44
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into vm1.(none):/home/stever/bk/newmem-cache2
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extra : convert_revision : aa50af3094f5d459f75b514179b6e3ec5e0bf1df
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src/arch/mips/SConscript:
"mips import pt.1".
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extra : convert_revision : 2e393341938bebf32fb638a209262d074fad4cc1
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into zizzer.eecs.umich.edu:/.automount/wexford/x/gblack/newmem-o3-micro
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extra : convert_revision : 3fa3fa4544ff8c9d2135e1befe6c8f4757006a2a
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into vm1.(none):/home/stever/bk/newmem-cache2
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extra : convert_revision : 1da75335907fee2d1745ec13e515819dfe2aad89
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Single-cpu timing mode seems to work now.
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extra : convert_revision : 720f6172df18a1c941e5bd0e8fdfbd686c13c7ad
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extra : convert_revision : 28a6df1efe4298877dc2b20179caeb25dfdc4622
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extra : convert_revision : d8d139180917f54006a5a79df4a0f206ddd39fed
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into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-o3-micro
src/cpu/o3/fetch_impl.hh:
hand merge
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extra : convert_revision : 3f71f3ac2035eec8b6f7bceb6906edb4dd09c045
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into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86
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extra : convert_revision : ba4d93f354749d02278b16e78b4ecd4b2311416b
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into vm1.(none):/home/stever/bk/newmem-cache2
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extra : convert_revision : 9002940097a166c8442ae1adf41b974227968920
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configs/example/memtest.py:
Add progress interval option.
src/base/traceflags.py:
Add MemTest flag.
src/cpu/memtest/memtest.cc:
Clean up tracing.
src/cpu/memtest/memtest.hh:
Get rid of unused code.
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extra : convert_revision : 92bd8241a6c90bfb6d908e5a5132cbdb500cbb87
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don't spend so much time calling malloc()
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extra : convert_revision : a946564eee46ed7d2aed41c32d488ca7f036c32f
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extra : convert_revision : 005464e875ede1e37dfe0e0482c29fd793ca52be
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extra : convert_revision : 9e57e582dd1ef2805d5adffcc0ccfd99596d9f54
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extra : convert_revision : 1fd66ba519d211fec18641b6df94b7640c56080c
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extra : convert_revision : 17e67cf6ea17fe6f971ef608547983fbb94adec9
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an "ID", and also added support for symbols.
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extra : convert_revision : 60d1ef677a6a59a9d897086893843ec1ec368148
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extra : convert_revision : 99053414cef40f13c5226871a72909b2622d8c26
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displacement.
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extra : convert_revision : 9202c11ee187458adcd85ba616b7f7f4bdd4eec1
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extra : convert_revision : c4a76262d4396f5f5b96b1c9e751014c2abbd78a
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extra : convert_revision : aabaaf099f070832bf42cedf2472170e0738ee1c
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into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86
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extra : convert_revision : f2fac2b1a09e709021cd8382a9fbe805df2177ef
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extra : convert_revision : 514032e21c8861f20fcbcae7204e132088cc7dbc
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Caused slowdown in performance instead of speeding up.
src/cpu/base.cc:
Removed "adding instead of dividing" trick.
src/mem/bus.cc:
Fixed spelling in comments.
Removed "adding instead of dividing" trick.
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extra : convert_revision : 65a736f4f09a64e737dc7aeee53b117976330488
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extra : convert_revision : 1c920b050c21e592a386410e4e9f45354f8e4441
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supposed to and make sure parameters have the right type.
Also make sure that any object that should be an intermediate
type has the right options set.
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extra : convert_revision : d56910628d9a067699827adbc0a26ab629d11e93
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extra : convert_revision : ec73c3c8788757990a6fab8c600f3b353d0d4206
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an lea microop, move EmulEnv into it's own .cc and .hh.
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extra : convert_revision : 1212b8463eab1c1dcba7182c487d1e9184cf9bea
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into doughnut.hpl.hp.com:/home/gblack/newmem-o3-micro
src/cpu/base_dyn_inst_impl.hh:
src/cpu/o3/fetch_impl.hh:
Hand merge
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extra : convert_revision : 0c0692033ac30133672d8dfe1f1a27e9d9e95a3d
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the MOVSXD instruction.
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extra : convert_revision : 38b9bf6cd4bdec6355b1158967c7d3562715cacd
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extra : convert_revision : 7542f130b269a6a09e6ed51ae4689d1faa45a155
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is probably fine as far as the predecoder goes, but the simple cpu might want to not refetch something it already has. That reintroduces the self modifying code problem though.
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extra : convert_revision : 802197e65f8dc1ad657c6b346091e03cb563b0c0
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64 bit mode. Also add in more versions of PUSH and POP, and a version of near CALL.
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extra : convert_revision : 7d8266cdfa54ac25610466b3533d3e9e5433297b
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extra : convert_revision : dbde025b1dcec0083e7276a9938bd21e7ab2887f
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extra : convert_revision : dc9d67dd5413f00f16d37cb2d0f8b0d10971e14a
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reimplemented. The comments are basically functioning like a todo list.
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extra : convert_revision : cb07e3813f6cf882b4a5c77c498ffbca26adf586
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into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86
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extra : convert_revision : 2dfc24b0720b3b378858a289e4bb6f4ee7132b3d
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and use them directly out of the instruction. The extra copies are conceptually realistic but are just innefficient as implemented. Also don't use the zeroeth microcode register for general storage since it's now the zero register, and implement a load and a store microops.
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extra : convert_revision : 0686296ca8b72940d961ecc6051063bfda1e932d
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extra : convert_revision : aad0ec51745fb94335898b0565bb11c1b399bbee
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extra : convert_revision : 8cbe3ca0d05165f7da5d6fa38c899ecc9e782511
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the time it was repsonded to. In timing mode the
time it was responded to is curTick. Doesn't change the results, but it does make implementation of nextCycle() more difficult
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extra : convert_revision : 67ed6261a5451d17d96d5df45992590acc353afc
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