gem5 - gem5

Age	Commit message (Expand)	Author
2015-08-28	ruby: Use the const serialize interface in RubySystem	Andreas Sandberg
2015-08-27	ruby: handle llsc accesses through CacheEntry, not CacheMemory	Nilay Vaish
2015-08-26	cpu: quiesce pseudoinsts: Always do full quiesce	Emilio Castillo
2015-08-24	mem: Revert requirement on packet addr/size always valid	Andreas Hansson
2015-08-21	mem: Reflect that packet address and size are always valid	Andreas Hansson
2015-08-21	arm, mem: Remove unused CLEAR_LL request flag	Andreas Hansson
2015-08-21	mem: Remove unused cache squash functionality	Andreas Hansson
2015-08-21	mem: Add explicit Cache subclass and make BaseCache abstract	Andreas Hansson
2015-08-21	ruby: Move Rubys cache class from Cache.py to RubyCache.py	Andreas Hansson
2015-08-21	mem: Move cache_impl.hh to cache.cc	Andreas Hansson
2015-08-21	cpu: Move invldPid constant from Request to BaseCPU	Andreas Hansson
2015-08-19	ruby: reverts to changeset: bf82f1f7b040	Nilay Vaish
2015-08-14	ruby: add accessor functions to SLICC def of MachineID	Nilay Vaish
2015-08-14	ruby: simple network: refactor code	Nilay Vaish
2015-08-14	ruby: profiler: provide the number of vnets through ruby system	Nilay Vaish
2015-08-14	ruby: directory memory: drop unused variable.	Nilay Vaish
2015-08-14	ruby: slicc: remove a stray line in StateMachine.py	Nilay Vaish
2015-08-14	ruby: garnet: flexible: refactor flit	Nilay Vaish
2015-08-14	ruby: DataBlock: adds a comment	Nilay Vaish
2015-08-14	ruby: remove random seed	Nilay Vaish
2015-08-14	ruby: SubBlock: refactor code	Nilay Vaish
2015-08-14	ruby: cache recorder: move check on block size to RubySystem.	Nilay Vaish
2015-08-14	ruby: abstract controller: mark some variables as const	Nilay Vaish
2015-08-14	ruby: simple network: store Switch* in PerfectSwitch and Throttle	Nilay Vaish
2015-08-14	ruby: remove unused functionalRead() function.	Nilay Vaish
2015-08-14	ruby: perfect switch: refactor code	Nilay Vaish
2015-08-14	ruby: cache memory: drop {try,test}CacheAccess functions	Nilay Vaish
2015-08-14	ruby: call setMRU from L1 controllers, not from sequencer	Nilay Vaish
2015-08-14	ruby: adds set and way indices to AbstractCacheEntry	Nilay Vaish
2015-08-14	ruby: eliminate type uint64 and int64	Nilay Vaish
2015-08-14	ruby: slicc: use default argument value	Nilay Vaish
2015-08-14	ruby: slicc: avoid duplicate code for function argument check	Nilay Vaish
2015-08-14	ruby: drop the [] notation for lookup function.	Nilay Vaish
2015-08-14	ruby: handle llsc accesses through CacheEntry, not CacheMemory	Nilay Vaish
2015-08-14	ruby: replace Address by Addr	Nilay Vaish
2015-08-14	ruby: rename variables Addr to addr	Nilay Vaish
2015-08-14	ruby: Protocol changes for SimObject MessageBuffers	Joel Hestness
2015-08-14	ruby: Expose MessageBuffers as SimObjects	Joel Hestness
2015-08-14	ruby: Change PerfectCacheMemory::lookup to return pointer	Joel Hestness
2015-08-14	ruby: Remove the RubyCache/CacheMemory latency	Joel Hestness
2015-08-11	sim: clocked object: function for converting cycles to ticks.	Nilay Vaish
2015-08-11	ruby: drop some redundant includes	Nilay Vaish
2015-08-11	ruby: slicc: allow mathematical operations on Ticks	Nilay Vaish
2015-08-07	sim: Flag EventQueue::getCurTick() as const	Andreas Sandberg
2015-08-07	mem: Cleanup packet accessor methods	Andreas Sandberg
2015-08-07	dev: Implement a simple display timing generator	Andreas Sandberg
2015-08-07	arm: Add support for programmable oscillators	Andreas Sandberg
2015-08-07	dev: Add a simple DMA engine that can be used by devices	Andreas Sandberg
2015-08-07	sim: Split ClockedObject to make it usable to non-SimObjects	Andreas Sandberg
2015-08-07	base: Rewrite the CircleBuf to fix bugs and add serialization	Andreas Sandberg