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AgeCommit message (Expand)Author
2013-10-17cpu: Change IEW DPRINTF to use IEW debug flagFaissal Sleiman
2013-10-17cpu: Put in assertions to check for maximum supported LQ/SQ sizeFaissal Sleiman
2013-10-17arm: Accomodate function name changes in newer linux kernelsEric Van Hensbergen
2013-10-17arm: Fix a GIC mask register bugAli Saidi
2013-10-17cpu: Fix O3 uncacheable load that is replayed but misses the TLBAli Saidi
2013-10-17mem: Make MemoryAccess flag more verboseAli Saidi
2013-10-17build: Place proto output in the same directory, also for EXTRASAndreas Hansson
2013-10-17dev: Allow additional UART interrupts to be setAli Saidi
2013-10-16kvm: Fix latency calculation of IPR accessesAndreas Sandberg
2013-10-15ruby: eliminate non-determinism from ruby.stats outputSteve Reinhardt
2013-10-15arch/x86: add support for explicit CC register fileYasuko Eckert
2013-10-15cpu: add a condition-code register classYasuko Eckert
2013-10-15cpu/o3: clean up rename map and free listSteve Reinhardt
2013-10-15cpu: rename *_DepTag constants to *_Reg_BaseSteve Reinhardt
2013-10-15isa: clean up register constantsSteve Reinhardt
2013-10-15cpu/o3: clean up scoreboard objectSteve Reinhardt
2013-10-15cpu/o3: clean up physical register fileSteve Reinhardt
2013-10-15cpu/inorder: merge register class enumsSteve Reinhardt
2013-10-15cpu: clean up architectural register classificationSteve Reinhardt
2013-10-15mem: Rename the ASI_BITS flag field in RequestAndreas Sandberg
2013-10-15mem: Use a flag instead of address bit 63 for generic IPRsAndreas Sandberg
2013-10-07x86: enables lstat and readlink syscallsNilay Vaish
2013-10-07base: Fix a potential race in PollQueue::setupAsyncIOAndreas Sandberg
2013-10-03kvm: Service events in the instruction event queuesAndreas Sandberg
2013-09-30x86: Add support for m5ops through a memory mapped interfaceAndreas Sandberg
2013-09-30arch: Add support for m5ops using mmapped IPRsAndreas Sandberg
2013-09-30x86: Add support for FXSAVE, FXSAVE64, FXRSTOR, and FXRSTOR64Andreas Sandberg
2013-09-30x86: Add support for FLDENV & FNSTENVAndreas Sandberg
2013-09-30x86: Add support for loading 32-bit and 80-bit floats in the x87Andreas Sandberg
2013-09-30x86: Fix re-entrancy problems in x87 store instructionsAndreas Sandberg
2013-09-30kvm: Add support for thread-specific instruction eventsAndreas Sandberg
2013-09-30kvm: FPU synchronization support on x86Andreas Sandberg
2013-09-30x86: Add support routines to load and store 80-bit floatsAndreas Sandberg
2013-09-30x86: Add limited support for extracting function call argumentsAndreas Sandberg
2013-09-30kvm: x86: Fix segment registers to make them VMX compatibleAndreas Sandberg
2013-09-25kvm: Add x86 segment register verification to help debuggingAndreas Sandberg
2013-09-25kvm: Initial x86 supportAndreas Sandberg
2013-09-19kvm: Correctly handle the return value from handleIpr(Read|Write)Andreas Sandberg
2013-09-19kvm: Fix a case where the run timers weren't armed properlyAndreas Sandberg
2013-09-19x86: Add support routines to convert between x87 tag formatsAndreas Sandberg
2013-09-18sim: Fix undefined behavior in the pseudo-inst interfaceAndreas Sandberg
2013-09-18mem: Fix scheduling bug in SimpleMemoryAndreas Hansson
2013-09-18swig: Fix issue with circular import in 2.0.9/2.0.10Andreas Hansson
2013-09-18x86: Expose the raw hash map of MSRsAndreas Sandberg
2013-09-18x86: Add support for checking the raw state of an interruptAndreas Sandberg
2013-09-18x86: Expose the interrupt vector in faultsAndreas Sandberg
2013-09-11ruby: Fix Topology throttle connectionsJoel Hestness
2013-09-11cpu: Dynamically instantiate O3 CPU LSQUnitsJoel Hestness
2013-09-11ruby: Statically allocate stats in SimpleNetwork, Switch, ThrottleJoel Hestness
2013-09-09stats: add operator= for DataWrapVec classNilay Vaish
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