gem5 - gem5

Age	Commit message (Expand)	Author
2017-12-05	mem: Add support for handling CMOs in the MSHRs	Nikos Nikoleris
2017-12-05	mem: Add support for CMOs in the cache	Nikos Nikoleris
2017-12-05	mem: Promote deferred targets only when the block is valid	Nikos Nikoleris
2017-12-05	mem: Add support for cache maintenance operation requests	Nikos Nikoleris
2017-12-05	mem: Support for specifying the destination of a WriteClean	Nikos Nikoleris
2017-12-05	mem: Add support for WriteClean packets in the memory system	Nikos Nikoleris
2017-12-05	mem: Add a WriteClean command to the packet class	Nikos Nikoleris
2017-12-05	mem-cache: Add support for checking whether a cache is busy	Nikos Nikoleris
2017-12-05	mem: Add function to check if the slave can receive a timing req	Nikos Nikoleris
2017-12-05	mem: Add the notion of point of unification in the coherent xbar	Nikos Nikoleris
2017-12-05	learning_gem5: Adding code for SimpleCache	Jason Lowe-Power
2017-12-05	learning_gem5: Adds the simple MemObject code	Jason Lowe-Power
2017-12-05	learning_gem5: Add code for hello-goodbye example	Jason Lowe-Power
2017-12-05	learning_gem5: Add code for simple SimObject	Jason Lowe-Power
2017-12-04	base: Rework the trie dump function to accept a different ostream.	Gabe Black
2017-12-04	misc: Rename misc.(hh\|cc) to logging.(hh\|cc)	Gabe Black
2017-12-04	misc: Move the ExitLogger class definition into misc.cc	Gabe Black
2017-12-04	tests: Remove trietest's dependence on cprintf.	Gabe Black
2017-12-04	tests: Add a ptr helper function trietest.	Gabe Black
2017-12-04	tests: Get rid of the bitvectest unit test.	Gabe Black
2017-12-01	arm: Enable ns registers access in secure mode	Giacomo Travaglini
2017-11-30	arch-riscv: use sext rather than manual masks	Alec Roelke
2017-11-30	arch-riscv: Remove spaces around ea_code	Alec Roelke
2017-11-29	arch-riscv: Add missing license paragraphs	Alec Roelke
2017-11-29	cpu: Don't override ISA if provided by user	Andreas Sandberg
2017-11-29	cpu-minor: Add missing instruction stats	David Guillen Fandos
2017-11-29	arch-riscv: Remove static parts of AMOs out of ISA	Alec Roelke
2017-11-29	arch-riscv: Move parts of mem insts out of ISA	Alec Roelke
2017-11-29	arch-riscv: Move unknown out of ISA description	Alec Roelke
2017-11-29	arch-riscv: Move standard ops out of ISA	Alec Roelke
2017-11-28	cpu-o3: Add missing vector stat initializers	Andreas Sandberg
2017-11-28	arch-arm: Add haveEL pseudocode function	Giacomo Travaglini
2017-11-28	arch-arm: Add assertions when extracting an ArmSystem from a TC	Giacomo Travaglini
2017-11-28	tests: Move the bituniontest to be alongside the bitunion header.	Gabe Black
2017-11-28	scons: Build GTests in the directory they're declared.	Gabe Black
2017-11-28	tests: Reimplement the bituniontest as a googletest.	Gabe Black
2017-11-28	scons: Add in a new type of unit test called GTest.	Gabe Black
2017-11-28	scons: Minor cleanup of how partial linking is handled in makeEnv.	Gabe Black
2017-11-28	arch-riscv: Move static_inst into a directory	Alec Roelke
2017-11-27	tests: Build the input file into the initest unit test.	Gabe Black
2017-11-27	scons: Break make_obj into make_static and make_shared functions.	Gabe Black
2017-11-27	scons: Remove the extra_deps option from the helper function make_obj.	Gabe Black
2017-11-27	scons: Get rid of a flag which makes Werror optional.	Gabe Black
2017-11-27	scons: Move some compiler flag setting code to the SConstruct.	Gabe Black
2017-11-27	scons: Get rid of SourceFile's done function.	Gabe Black
2017-11-27	scons: Switch from "guards" to "tags" on source files.	Gabe Black
2017-11-22	tests: Resurrect initest input file(s).	Gabe Black
2017-11-22	tests: Fix the stats unit test.	Gabe Black
2017-11-22	arch-arm: Add support for the brk instruction	Andreas Sandberg
2017-11-22	arch-arm: HVC instruction undefined in secure EL1	Giacomo Travaglini