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Age
Commit message (
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Author
2012-09-25
build: Add missing dependencies when building param SWIG interfaces
Andreas Sandberg
2012-09-23
RubyPort and Sequencer: Fix draining
Joel Hestness
2012-09-21
DRAM: Introduce SimpleDRAM to capture a high-level controller
Andreas Hansson
2012-09-21
TrafficGen: Add a basic traffic generator
Andreas Hansson
2012-09-21
Mem: Tidy up bus member variables types
Andreas Hansson
2012-09-21
SE: Ignore FUTEX_PRIVATE_FLAG of sys_futex
Lluc Alvarez
2012-09-20
bus: removed outdated warn regarding 64 B block sizes
Anthony Gutierrez
2012-09-19
Mem: Remove the file parameter from AbstractMemory
Andreas Hansson
2012-09-19
AddrRange: Transition from Range<T> to AddrRange
Andreas Hansson
2012-09-19
AddrRange: Simplify Range by removing stream input/output
Andreas Hansson
2012-09-19
AddrRange: Remove unused range_multimap
Andreas Hansson
2012-09-19
AddrRange: Simplify AddrRange params Python hierarchy
Andreas Hansson
2012-09-18
ruby: eliminate typedef integer_t
Nilay Vaish
2012-09-18
ruby: avoid using g_system_ptr for event scheduling
Nilay Vaish
2012-09-18
Mem: Add a maximum bandwidth to SimpleMemory
Andreas Hansson
2012-09-14
gcc: Enable Link-Time Optimization for gcc >= 4.6
Andreas Hansson
2012-09-14
scons: Add a target for google-perftools profiling
Andreas Hansson
2012-09-14
scons: Restructure ccflags and ldflags
Andreas Hansson
2012-09-14
scons: Use c++0x with gcc >= 4.4 instead of 4.6
Andreas Hansson
2012-09-12
Standard Switch: Drain the system before switching CPUs
Joel Hestness
2012-09-12
Base CPU: Initialize profileEvent to NULL
Joel Hestness
2012-09-12
Ruby: Modify Scons so that we can put .sm files in extras
Jason Power
2012-09-12
stats: remove duplicate instruction stats from the commit stage
Anthony Gutierrez
2012-09-11
clang: Fix issues identified by the clang static analyzer
Andreas Hansson
2012-09-11
Cache: Split invalidateBlk up to seperate block vs. tags
Lena Olson
2012-09-11
X86: make use of register predication
Nilay Vaish
2012-09-11
x86: Add a separate register for D flag bit
Nilay Vaish
2012-06-03
ISA Parser: Allow predication of source and destination registers
Nilay Vaish
2012-09-11
Ruby: Use uint32_t instead of uint32 everywhere
Nilay Vaish
2012-09-11
Ruby: Use uint8_t instead of uint8 everywhere
Nilay Vaish
2012-09-10
Ruby System: Convert to Clocked Object
Nilay Vaish
2012-09-10
Ruby Slicc: remove the call to cin.get() function
Nilay Vaish
2012-09-10
Mem: Allow serializing of more than INT_MAX bytes
Marco Elver
2012-09-10
NetBSD: Build on NetBSD
Palle Lyckegaard
2012-09-10
AddrRange: Remove the unused range_ops header
Andreas Hansson
2012-09-10
Inet: Remove the SackRange and its use
Andreas Hansson
2012-09-10
Device: Bump PIO and PCI latencies to more reasonable values
Andreas Hansson
2012-09-07
sim: Update the SimObject documentation
Andreas Sandberg
2012-09-07
sim: Remove the unused SimObject::regFormulas method
Andreas Sandberg
2012-09-07
O3: Get rid of incorrect assert in RAS.
Ali Saidi
2012-09-07
dev: Fix bifield definition in timer_cpulocal.hh
Ali Saidi
2012-09-07
Igbe: Newer kernels seem to allow TSO headers and packet data to be in one desc
Ali Saidi
2012-09-07
sim: add validation to make sure there is memory where we're loading the kernel
Krishnendra Nathella
2012-09-07
loader: initialize all memory in the ObjectFile objects.
Ali Saidi
2012-09-07
ARM: Fix one of the timers used in the VExpress EMM platform.
Ali Saidi
2012-09-07
Param: Transition to Cycles for relevant parameters
Andreas Hansson
2012-09-05
Ruby Memory Controller: Fix clocking
Joel Hestness
2012-08-28
Ruby: Correct DataBlock =operator
Jason Power
2012-08-28
Clock: Add a Cycles wrapper class and use where applicable
Andreas Hansson
2012-08-28
Clock: Rework clocks to avoid tick-to-cycle transformations
Andreas Hansson
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