gem5 - gem5

Age	Commit message (Collapse)	Author
2009-07-13	Minor fixes for compiling	Polina Dudnik

2009-07-13	Replaced RMW with Locked. RMW will be used for the coherence-aided atomics ↵	Polina Dudnik
	other than LLSC
2009-07-13	Moved the lock check and clearing the lock into makeRequest	Polina Dudnik

2009-07-13	Forgot to replace one of the RubyRequest_RMW	Polina Dudnik

2009-07-13	Reintegrated Derek's functional implementation of atomics with a minor ↵	Polina Dudnik
	change: don't clear lock on failure
2009-07-10	ISAs: Get rid of the IControl operand type.	Gabe Black
	A separate operand type is not necessary to use two bitfields to generate the index.
2009-07-10	SPARC: Set up a lookup table for integer register flattening.	Gabe Black
	Using a look up table changed the run time of the SPARC_FS solaris boot regression from: real 14m45.951s user 13m57.528s sys 0m3.452s to: real 12m19.777s user 12m2.685s sys 0m2.420s
2009-07-09	X86: Fold the MiscRegFile all the way into the ISA object.	Gabe Black

2009-07-09	SPARC: Fold the MiscRegFile all the way into the ISA object.	Gabe Black

2009-07-09	MIPS: Fold the MiscRegFile all the way into the ISA object.	Gabe Black

2009-07-09	ARM: Fold the MiscRegFile all the way into the ISA object.	Gabe Black

2009-07-09	Alpha: Missed a file in an earlier changeset.	Gabe Black

2009-07-08	Get rid of the unused get(Data\|Inst)Asid and (inst\|data)Asid functions.	Gabe Black

2009-07-08	Alpha: Pull the MiscRegFile fully into the ISA object.	Gabe Black

2009-07-08	Registers: Add a registers.hh file as an ISA switched header.	Gabe Black
	This file is for register indices, Num* constants, and register types. copyRegs and copyMiscRegs were moved to utility.hh and utility.cc. --HG-- rename : src/arch/alpha/regfile.hh => src/arch/alpha/registers.hh rename : src/arch/arm/regfile.hh => src/arch/arm/registers.hh rename : src/arch/mips/regfile.hh => src/arch/mips/registers.hh rename : src/arch/sparc/regfile.hh => src/arch/sparc/registers.hh rename : src/arch/x86/regfile.hh => src/arch/x86/registers.hh
2009-07-08	Registers: Collapse ARM and MIPS regfile directories.	Gabe Black
	--HG-- rename : src/arch/arm/regfile/misc_regfile.hh => src/arch/arm/misc_regfile.hh rename : src/arch/arm/regfile/regfile.cc => src/arch/arm/regfile.cc rename : src/arch/mips/regfile/misc_regfile.cc => src/arch/mips/misc_regfile.cc rename : src/arch/mips/regfile/misc_regfile.hh => src/arch/mips/misc_regfile.hh
2009-07-08	Alpha: Move reg_redir into its own files, and move some constants into ↵	Gabe Black
	regfile.hh.
2009-07-08	Registers: Eliminate the ISA defined RegFile class.	Gabe Black

2009-07-08	Alpha: Get rid of function prototypes with no implementations.	Gabe Black

2009-07-08	Registers: Move the PCs out of the ISAs and into the CPUs.	Gabe Black

2009-07-08	ARM, Simple CPU: Fix an index and add assert checks.	Gabe Black

2009-07-08	MIPS: Get rid of an orphaned MIPS .cc file.	Gabe Black

2009-07-08	Alpha: Phase out Alpha's intregfile.hh and intregfile.cc.	Gabe Black

2009-07-08	SPARC: Phase out SPARC's intregfile.hh.	Gabe Black

2009-07-08	X86: Phase out x86's intregfile.hh.	Gabe Black

2009-07-08	MIPS: Phase out MIPS's int_regfile.hh.	Gabe Black

2009-07-08	ARM: Flush out the ARM's int_regfile.hh.	Gabe Black

2009-07-08	Registers: Eliminate the ISA defined integer register file.	Gabe Black

2009-07-08	Registers: Eliminate the ISA defined floating point register file.	Gabe Black

2009-07-08	Registers: Get rid of the float register width parameter.	Gabe Black

2009-07-08	Registers: Add an ISA object which replaces the MiscRegFile.	Gabe Black
	This object encapsulates (or will eventually) the identity and characteristics of the ISA in the CPU.
2009-07-08	ARM: Use custom read/write code to alias R15 with the PC.	Gabe Black

2009-07-08	ISA parser: Allow alternative read/write code for operands.	Gabe Black

2009-07-08	ARM: Move the remaining microops out of the decoder and into the ISA desc.	Gabe Black

2009-07-08	ARM: Move the memory microops out of the decoder and into the ISA desc.	Gabe Black

2009-07-08	ARM: Move the integer microops out of the decoder and into the ISA desc.	Gabe Black

2009-07-08	ARM: Improve memory instruction disassembly.	Gabe Black

2009-07-08	ARM: Tune up predicated instruction decoding.	Gabe Black

2009-07-08	ARM: Get rid of the MemAcc and EAComp static insts.	Gabe Black

2009-07-08	ARM: Get rid of end_addr in the ArmMacroStore constructor.	Gabe Black

2009-07-08	ARM: Add an AddrMode2 format for memory instructions that use address mode 2.	Gabe Black

2009-07-08	ARM: Don't always update CPSR.	Gabe Black

2009-07-08	ARM: Add an AddrMode3 format for memory instructions that use address mode 3.	Gabe Black

2009-07-08	ARM: Add load/store double instructions.	Gabe Black

2009-07-08	ARM: Add operands for the load/store double instructions.	Gabe Black

2009-07-08	X86: Fix a bug in IRET_PROT's microcode. The immediate form of sra was intended.	Gabe Black

2009-07-08	slicc: fixed MI_example bug. The directory wasn't deallocating the TBE, ↵	Derek Hower
	leading to a leak. Also increased the default max TBE size to 256 to allow memtest to pass the regression.
2009-07-08	ruby: set the default values of the debug object so that nothing is printed	Derek Hower

2009-07-08	slicc: Fixed MI_example bug. The directory was not writing data to DRAM ↵	Derek Hower
	after a PUTX.
2009-07-07	removed stray debug print	Derek Hower