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2007-06-10Add a function to get a SimObject's memory mode and reworkNathan Binkert
the set memory mode code to only go through the change if it is necessary --HG-- extra : convert_revision : 28288227bb56b0a04d756776eaf0a4ff9e1f8c20
2007-06-09Add a startup function that will fast forward to the right clock edgeNathan Binkert
using a divide in order to not loop forever after resuming from a checkpoint --HG-- extra : convert_revision : 4bbc70b1be4e5c4ed99d4f88418ab620d5ce475a
2007-06-09Use the right typeNathan Binkert
--HG-- extra : convert_revision : b5ca3153ca786ea4e86bfe83f7760ba9ee41a882
2007-06-09only compile fenv.c if we're using fenvNathan Binkert
--HG-- extra : convert_revision : 990726f724f99505fc999af82bfb1bbcd6c7f1a2
2007-06-09More realistic parametersNathan Binkert
--HG-- extra : convert_revision : aaa4ea2b7c97df3d6b731e9252984b45715e9d6f
2007-06-08Fix another outdated comment.Gabe Black
--HG-- extra : convert_revision : 55f89d9f96734e96ae082399df6b0206d112cd6c
2007-06-08Adjust a few more comments.Gabe Black
--HG-- extra : convert_revision : 9b79ce72acf8932ce26e1744a149f2fd2435ea96
2007-06-08Fix up a potentially misleading comment.Gabe Black
--HG-- extra : convert_revision : 58d37d8cc8e41c9640038d6dddae4cb5649638aa
2007-06-08Fix the formatting on a comment.Gabe Black
--HG-- extra : convert_revision : 89636a7410dec54235416e3c16db98cc5eecf2b0
2007-06-08Clean up where files are included, and get rid of some cruft.Gabe Black
src/arch/x86/isa/main.isa: Clean up where files are included. --HG-- extra : convert_revision : 0528359432bf0fb9198b63de9611176bc78e07c7
2007-06-08Clean things up a little.Gabe Black
--HG-- extra : convert_revision : 62ad0839847db85738054da6f7da8a956b24143e
2007-06-08Merge zizzer.eecs.umich.edu:/bk/newmemGabe Black
into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86 --HG-- extra : convert_revision : 4a2f2884a9d1125dc3156e080931ddc40defcfc7
2007-06-08Move the microcode assembly to a python package instead of isa_parser files. ↵Gabe Black
Also, the code is now a single string which runs through the microcode assembler rather than docstrings associated with classes named after each architectural level instruction. --HG-- extra : convert_revision : 20e6d6ac625dde8f1885acc445882096df562778
2007-06-08Big changes to use the new microcode assembler.Gabe Black
--HG-- extra : convert_revision : 7d1a43c5791a2e7e30533746da3dd7036a5b8799
2007-06-08Fixed format arguments for XOR.Gabe Black
--HG-- extra : convert_revision : d64fe734fcdcc414ba9af9fc5f0f795429d5dad3
2007-06-08Add a bitfield to refer to the opSize member of the extMachInst.Gabe Black
--HG-- extra : convert_revision : 1854ebc00a9f3ae8c36cc579de6c3a2b48c0fdb6
2007-06-05Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/newmemAli Saidi
into zizzer.eecs.umich.edu:/tmp/newmem --HG-- extra : convert_revision : e0721f59cce9cb356b53977e21bd4a7c779c217d
2007-06-05Clean up some of vincent's code and commit itAli Saidi
Makes page table cache scheme actually work src/mem/page_table.cc: src/mem/page_table.hh: fix caching scheme to actually work and improve performance --HG-- extra : convert_revision : 443a8d8acbee540b26affcfdfbf107b8e735d1bd
2007-06-04Make limm (load immediate) microopGabe Black
--HG-- extra : convert_revision : f4883febd92cfade61c1a6a31fdb2d27296d9044
2007-06-04Merge zizzer.eecs.umich.edu:/bk/newmemGabe Black
into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86 --HG-- extra : convert_revision : 77222b85492c8ad6c0b776fa34c83065c77c402e
2007-06-04don't be so aggressive with the tracing on #ifAli Saidi
--HG-- extra : convert_revision : 8ee88bff8010dcb7a412f6a6b49d40fad1c0bb68
2007-06-04Reworking x86's microcode system. This is a work in progress, and X86 ↵Gabe Black
doesn't compile. src/arch/x86/isa/decoder/one_byte_opcodes.isa: src/arch/x86/isa/macroop.isa: src/arch/x86/isa/main.isa: src/arch/x86/isa/microasm.isa: src/arch/x86/isa/microops/base.isa: src/arch/x86/isa/microops/microops.isa: src/arch/x86/isa/operands.isa: src/arch/x86/isa/microops/regop.isa: src/arch/x86/isa/microops/specop.isa: Reworking x86's microcode system --HG-- extra : convert_revision : cab66be59ed758b192226af17eddd5a86aa190f3
2007-06-02Don't mask the pc because the Alpha predecoder needs it to set the PAL mode ↵Gabe Black
bit in the ExtMachInst. --HG-- extra : convert_revision : 87dc6e6b2281b6a11a0c0e8320b7f4acc29f6fb8
2007-06-01Fix typo so m5.fast will compileNathan Binkert
--HG-- extra : convert_revision : 8ceb816c17108d7cb65cb46d8dc2bd2753b0e0f0
2007-06-01Merge zizzer:/bk/newmemAli Saidi
into zeep.pool:/z/saidi/work/m5.newmem --HG-- extra : convert_revision : 43dc3a23758e7956572d59464ebddcc56e82728b
2007-06-01Merge zizzer:/bk/newmemAli Saidi
into zeep.pool:/z/saidi/work/m5.newmem src/cpu/simple/base.cc: hand merge vincent/gabe/my changes to cast sizeof() to a 64bit int --HG-- extra : convert_revision : eb989b4d65d08057df1777c04b8ee2cfa75a2695
2007-06-01cast sizeof(MachInst) to Addr before generating a maskAli Saidi
--HG-- extra : convert_revision : 1ae34a069bbd997a8f888f69415fbeaaf4ade0b3
2007-06-01don't generate trace data unless tracing is onAli Saidi
--HG-- extra : convert_revision : 3953ace8d481d758d6e0d89183c0a7e7bebcf681
2007-06-01Clean things upGabe Black
--HG-- extra : convert_revision : 72ffcf5492d4e4f899ea5761639147e001c525b0
2007-06-01Merge zizzer.eecs.umich.edu:/bk/newmemGabe Black
into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86 --HG-- extra : convert_revision : de6db1dbe0db519e75d723c7221a60f54b713f8f
2007-06-01Minor error. Forgotten to remove brackets for threadPC.Vincentius Robby
--HG-- extra : convert_revision : 40a636a539e84decfca438c07adf022eed7b7780
2007-05-31Add a second section to make sure the ROM is extended properly.Gabe Black
--HG-- extra : convert_revision : a69c09c5e62c8b00d6c8039199c02e8fecbf9f2f
2007-05-31Add rom based macroops into the macroop dict instead of dropping them on the ↵Gabe Black
floor --HG-- extra : convert_revision : 964391c8050af0239da32bcc77550740de1f3160
2007-05-31Do something with ROM based macroopsGabe Black
--HG-- extra : convert_revision : 3a14c683ab89217c083c58e8c374607dd04b66c4
2007-05-31Make directives take parameters and use the directive function and not it's nameGabe Black
--HG-- extra : convert_revision : fbc93ba592b0cc009696e8d7edead841ec2ea01c
2007-05-31Handle commentsGabe Black
--HG-- extra : convert_revision : 3f93baaf250922eb40d8718e978273b0def1e4dd
2007-05-31Merge zizzer.eecs.umich.edu:/bk/newmemGabe Black
into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86 src/cpu/simple/base.cc: Hand merge --HG-- extra : convert_revision : a2902ef9d917d22ffb9c7dfa2fd444694a65240d
2007-05-31Merge zizzer:/bk/newmemVincentius Robby
into zamp.eecs.umich.edu:/.automount/greenville/w/acolyte/newmem --HG-- extra : convert_revision : c80b7ef5a2cc4ab1b86bb1eef7fae91886a7737d
2007-05-31Assign traceData to be NULL at BaseSimpleCPU constructor.Vincentius Robby
Initialize a temporary variable for thread->readPC() at setupFetchRequest() to reduce function calls. exec tracing isn't needed for m5.fast binaries Moved MISCREG_GL, MISCREG_CWP, and MISCREG_TLB_DATA out of switch statement and use if blocks instead. src/arch/sparc/miscregfile.cc: Moved MISCREG_GL, MISCREG_CWP, and MISCREG_TLB_DATA out of switch statement and use if blocks instead. src/cpu/simple/base.cc: Assign traceData to be NULL at BaseSimpleCPU constructor. Initialize a temporary variable for thread->readPC() at setupFetchRequest() to reduce function calls. exec tracing isn't needed for m5.fast binaries --HG-- extra : convert_revision : 5dc92fff05c9bde994f1e0f1bb40e11c44eb72c6
2007-05-31Early micro assemblerGabe Black
src/arch/micro_asm.py: Micro assembler src/arch/micro_asm_test.py: Test script for the micro assembler. This probably should go somewhere else eventually. --HG-- extra : convert_revision : 277fdadec94763ae657f55f501704693b81e0015
2007-05-31x86 work that hadn't been checked in.Gabe Black
src/arch/x86/isa/decoder/one_byte_opcodes.isa: Give the "MOV" instruction the format of it's arguments. This will likely need to be completely overhauled in the near future. src/arch/x86/predecoder.cc: src/arch/x86/predecoder.hh: Make the predecoder explicitly reset itself rather than counting on it happening naturally. src/arch/x86/predecoder_tables.cc: Fix the immediate size table src/arch/x86/regfile.cc: nextnpc is bogus --HG-- extra : convert_revision : 0926701fedaab41817e64bb05410a25174484a5a
2007-05-30Fix cut-n-pasto to make the path correctNathan Binkert
--HG-- extra : convert_revision : a6194cc9c3b2eb83dc8480ed0417b2246f07b4bd
2007-05-30tport.cc:Steve Reinhardt
Oops... forgot to update call site after changing function argument semantics. src/mem/tport.cc: Oops... forgot to update call site after changing function argument semantics. --HG-- extra : convert_revision : 9234b991dc678f062d268ace73c71b3d13dd17dc
2007-05-29A little more cleanup & refactoring of SimpleTimingPort.Steve Reinhardt
Make it a better base class for cache ports. --HG-- extra : convert_revision : 37d6de11545a68c1a7d11ce33fe5971c51434ee4
2007-05-28Restructure SimpleTimingPort a bit:Steve Reinhardt
- factor out checkFunctional() code so it can be called from derived classes - use EventWrapper for sendEvent, move event handling code from event to port where it belongs - make sendEvent a pointer so derived classes can override it - replace std::pair with new class for readability --HG-- extra : convert_revision : 5709de2daacfb751a440144ecaab5f9fc02e6b7a
2007-05-28Reformat comments to meet line length restriction.Steve Reinhardt
--HG-- extra : convert_revision : 24c00ec4904d9fb4d6e39521e0ff8b8f60d60f6a
2007-05-28Remove unnecessary include of physical.hh.Steve Reinhardt
--HG-- extra : convert_revision : bccafe884e58a55b02ff408448e6644196e439a4
2007-05-27Move SimObject python files alongside the C++ and fixNathan Binkert
the SConscript files so that only the objects that are actually available in a given build are compiled in. Remove a bunch of files that aren't used anymore. --HG-- rename : src/python/m5/objects/AlphaTLB.py => src/arch/alpha/AlphaTLB.py rename : src/python/m5/objects/SparcTLB.py => src/arch/sparc/SparcTLB.py rename : src/python/m5/objects/BaseCPU.py => src/cpu/BaseCPU.py rename : src/python/m5/objects/FuncUnit.py => src/cpu/FuncUnit.py rename : src/python/m5/objects/IntrControl.py => src/cpu/IntrControl.py rename : src/python/m5/objects/MemTest.py => src/cpu/memtest/MemTest.py rename : src/python/m5/objects/FUPool.py => src/cpu/o3/FUPool.py rename : src/python/m5/objects/FuncUnitConfig.py => src/cpu/o3/FuncUnitConfig.py rename : src/python/m5/objects/O3CPU.py => src/cpu/o3/O3CPU.py rename : src/python/m5/objects/OzoneCPU.py => src/cpu/ozone/OzoneCPU.py rename : src/python/m5/objects/SimpleOzoneCPU.py => src/cpu/ozone/SimpleOzoneCPU.py rename : src/python/m5/objects/BadDevice.py => src/dev/BadDevice.py rename : src/python/m5/objects/Device.py => src/dev/Device.py rename : src/python/m5/objects/DiskImage.py => src/dev/DiskImage.py rename : src/python/m5/objects/Ethernet.py => src/dev/Ethernet.py rename : src/python/m5/objects/Ide.py => src/dev/Ide.py rename : src/python/m5/objects/Pci.py => src/dev/Pci.py rename : src/python/m5/objects/Platform.py => src/dev/Platform.py rename : src/python/m5/objects/SimConsole.py => src/dev/SimConsole.py rename : src/python/m5/objects/SimpleDisk.py => src/dev/SimpleDisk.py rename : src/python/m5/objects/Uart.py => src/dev/Uart.py rename : src/python/m5/objects/AlphaConsole.py => src/dev/alpha/AlphaConsole.py rename : src/python/m5/objects/Tsunami.py => src/dev/alpha/Tsunami.py rename : src/python/m5/objects/T1000.py => src/dev/sparc/T1000.py rename : src/python/m5/objects/Bridge.py => src/mem/Bridge.py rename : src/python/m5/objects/Bus.py => src/mem/Bus.py rename : src/python/m5/objects/MemObject.py => src/mem/MemObject.py rename : src/python/m5/objects/PhysicalMemory.py => src/mem/PhysicalMemory.py rename : src/python/m5/objects/BaseCache.py => src/mem/cache/BaseCache.py rename : src/python/m5/objects/CoherenceProtocol.py => src/mem/cache/coherence/CoherenceProtocol.py rename : src/python/m5/objects/Repl.py => src/mem/cache/tags/Repl.py rename : src/python/m5/objects/Process.py => src/sim/Process.py rename : src/python/m5/objects/Root.py => src/sim/Root.py rename : src/python/m5/objects/System.py => src/sim/System.py extra : convert_revision : 173f8764bafa8ef899198438fa5573874e407321
2007-05-26Get rid of GNU libelf and its autoconf nastiness and replaceNathan Binkert
it with FreeBSD's implementation --HG-- extra : convert_revision : ef9c4551b9a6b54b76a89f286ff9804c55790621
2007-05-25Merge zizzer.eecs.umich.edu:/bk/newmemGabe Black
into doughnut.mwconnections.com:/home/gblack/m5/newmem-x86 --HG-- extra : convert_revision : 276d00a73b1834d5262129c3f7e0f7fae18e23bc
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