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AgeCommit message (Collapse)Author
2009-04-19Mem: Fill out the comment that describes the LOCKED request flag.Gabe Black
2009-04-19Mem: Change isLlsc to isLLSC.Gabe Black
2009-04-19X86: Fix the functions that manipulate large bit arrays in the local APIC.Gabe Black
2009-04-19X86: Fix up a copyright.Gabe Black
2009-04-19X86: Fix how the TLB handles the storecheck flag.Gabe Black
2009-04-19X86: Recognize and handle the lock legacy prefix.Gabe Black
2009-04-19X86: Implement a locking version of XADD.Gabe Black
2009-04-19X86: Implement a locking version of BTC.Gabe Black
2009-04-19X86: Implement a locking version of BTR.Gabe Black
2009-04-19X86: Implement a locking version of CMPXCHG.Gabe Black
2009-04-19X86: Implement a locking version of BTS.Gabe Black
2009-04-19X86: Implement a locking version of DEC.Gabe Black
2009-04-19X86: Implement a locking version of INC.Gabe Black
2009-04-19X86: Implement a locking version of NEG.Gabe Black
2009-04-19X86: Implement a locking version of NOT.Gabe Black
2009-04-19X86: Implement a locking version of XCHG.Gabe Black
2009-04-19X86: Implement a locking version of XOR.Gabe Black
2009-04-19X86: Implement a locking version of SUB.Gabe Black
2009-04-19X86: Implement a locking version of AND.Gabe Black
2009-04-19X86: Implement a locking version of SBB.Gabe Black
2009-04-19X86: Implement a locking version of ADC.Gabe Black
2009-04-19X86: Implement a locking version of OR.Gabe Black
2009-04-19X86: Implement a locking version of ADD.Gabe Black
2009-04-19X86: Implement the stul microop.Gabe Black
This microop does a store and unlocks the requested address. The RISC86 microop ISA doesn't seem to have an equivalent to this, so I'm guessing that the store following an ldstl is automatically unlocking. We don't do it this way for performance reasons since the behavior is the same.
2009-04-19X86: Implement the ldstl microop.Gabe Black
This microop does a load, checks that a store would succeed, and locks the requested address.
2009-04-19CPUs: Make the atomic CPU support locked memory accesses.Gabe Black
2009-04-19Memory: Add a LOCKED flag back in for x86 style locking.Gabe Black
2009-04-19Memory: Rename LOCKED for load locked store conditional to LLSC.Gabe Black
2009-04-19SE mode: Make keeping track of the number of syscalls less hacky.Gabe Black
2009-04-19X86: Mask the PIC at startup to avoid a glitch which causes an NMI.Gabe Black
2009-04-19X86: Actually handle 16 bit mode modrm.Gabe Black
2009-04-19X86: Make the TEST instruction set all the flags it's supposed to.Gabe Black
2009-04-19X86: Implement broadcast IPIs.Gabe Black
2009-04-19X86: Fix the ordering of the vendor string reported by CPUID.Gabe Black
2009-04-19X86: Keep track of what the initial count value was in the LAPIC timer.Gabe Black
2009-04-19X86: Only recognize the first startup IPI after INIT or reset.Gabe Black
2009-04-19X86: Use recvResponse to implement the idle bit in the Local APIC ICR.Gabe Black
2009-04-19X86: Add a function which gets called when an interrupt message has been ↵Gabe Black
delivered.
2009-04-19X86: Fix the flags for interrupt response messages.Gabe Black
2009-04-19X86: Explicitly use the right width in a few places that need a 64 bit value.Gabe Black
2009-04-19X86: Keep track of the pioAddr for the local APIC.Gabe Black
2009-04-19X86: Implement far jmp.Gabe Black
2009-04-19X86: Some segment selectors can be used when "NULL".Gabe Black
2009-04-19X86: Fix a bug in the chks microop where it ignored that it found a fault.Gabe Black
2009-04-19X86: Make the interrupt entering microcode record the value to use, not ↵Gabe Black
actually use it.
2009-04-19X86: LEA calculates an address before segmentation.Gabe Black
2009-04-19X86: Implement the save machine status word instruction (SMSW).Gabe Black
2009-04-19X86: Implement the load machine status word instruction (LMSW).Gabe Black
2009-04-19X86: Only use %eax to select a function and look like we support sse2.Gabe Black
2009-04-19X86: Fix the mov to segment selector in real mode instruction microcode.Gabe Black
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