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AgeCommit message (Expand)Author
2014-10-16dev: refactor pci config space for sysfs scanningGeoffrey Blake
2014-10-16mem: Add ExternalMaster and ExternalSlave portsAndrew Bardsley
2014-10-16sim: EventQueue wakeup on events scheduled outside the event loopAndreas Hansson
2014-10-16base: Reimplement the DPRINTF mechanism in a Logger classAndrew Bardsley
2014-10-16arch: Use shared_ptr for all FaultsAndreas Hansson
2014-10-16o3: Use shared_ptr for MemDepEntryAndreas Hansson
2014-10-16mem: Use shared_ptr for Ruby Message classesAndreas Hansson
2014-10-16base: Use shared_ptr for stat NodeAndreas Hansson
2014-10-16base: Transition CP annotate to use shared_ptrAndreas Hansson
2014-10-16dev: Use shared_ptr for EthPacketDataAndreas Hansson
2014-10-16dev: Use shared_ptr for Arguments::DataAndreas Hansson
2014-10-16arch,x86,mem: Dynamically determine the ISA for Ruby store checkAndreas Hansson
2014-10-16mem: Dynamically determine page bytes in memory componentsAndreas Hansson
2014-10-16arm: Add helper methods to setup architected PMU eventsAndreas Sandberg
2014-10-16cpu: Probe points for basic PMU statsAndreas Sandberg
2014-10-16arm: Add TLB PMU probesAndreas Sandberg
2014-10-16cpu: Add branch predictor PMU probe pointsAndreas Sandberg
2014-10-16arm: Add a model of an ARM PMUv3Andreas Sandberg
2014-10-16sim: Add typedefs for PMU probe pointsAndreas Sandberg
2014-10-16sim: Add support for serializing BitUnionXXAndreas Sandberg
2014-10-16config: Add the ability to read a config file using C++ and PythonAndreas Hansson
2014-10-16scons: Add Undefined Behavior Sanitizer (UBSan) optionAndreas Hansson
2014-08-12scons: Generate a single debug flag C++ fileCurtis Dunham
2014-10-16scons: create dummy target to have SWIG generate C++ classesCurtis Dunham
2014-10-16config: Add a --without-python option to build processAndrew Bardsley
2014-10-11cpu: Fix o3 SMT IQCount bugAndrew Lukefahr
2014-10-11ruby: network: garnet: add statistics for different activitiesNilay Vaish
2014-10-11ruby: network: garnet: remove functions for computing powerNilay Vaish
2014-10-11ruby: drop Orion network power modelNilay Vaish
2014-10-11ruby: mesi: slight renamingNilay Vaish
2014-10-11ruby: structures: coorect #ifndef macros in header filesNilay Vaish
2014-06-13x86: add LongModeAddressSize function to cpuidJiuyue Ma
2014-10-11sim: draining bug for fast-forwaring multiple coresAndrew Lukefahr
2014-10-11base: addr range: slight change to validity checkNilay Vaish
2014-10-11base: misc: Add missing header file.Nilay Vaish
2014-07-29mem: DRAMPower integration for on-line DRAM power statsOmar Naji
2014-07-29mem: Add DRAMPower wrapping classOmar Naji
2014-07-25mem: Add missig timing and current parameters to DRAM configsOmar Naji
2014-10-09mem: Remove DRAMSim2 DDR3 configurationOmar Naji
2014-10-09config: Add Current as a parameter typeAndreas Hansson
2014-10-09cpu: Remove Ozone CPU from the source treeMitch Hayenga
2014-10-09mem: Add packet sanity checks to cache and MSHRsAndreas Hansson
2014-10-09mem: Allow packet queue to move next send event forwardAndreas Hansson
2014-10-01misc: Fix issues identified by static analysisAndreas Hansson
2014-10-01arm: Use MiscRegIndex rather than int when flatteningAndreas Hansson
2014-10-01arm: More UBSan cleanups after additional full-system runsAndreas Hansson
2014-09-27arm: Fixed undefined behaviours identified by gccAndreas Hansson
2014-09-27arch: Use const StaticInstPtr references where possibleAndreas Hansson
2014-09-27scons: Address issues related to gcc 4.9.1Andreas Hansson
2014-09-27dev: Output invalid access size in IsaFake panicCurtis Dunham
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