| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2009-07-27 | ARM: Fix fstat/fstat64 structs to match EABI definitions. | Ali Saidi | |
| 2009-07-27 | ARM: Handle register indexed system calls. | Ali Saidi | |
| 2009-07-27 | ARM: Detect OABI binaries and complain that they're no-longer supported. | Ali Saidi | |
| 2009-07-25 | SPARC: Fix a minor compile bug in native trace on gcc > 4.1. | Gabe Black | |
| 2009-07-25 | o3-smt: enforce numThreads parameter for SMT SE mode | Korey Sewell | |
| 2009-07-22 | Fixed the licences plus minor fixes for compilation | Polina Dudnik | |
| 2009-07-22 | MIPS: Small fix I forgot to qrefresh into my last change. | Gabe Black | |
| 2009-07-22 | MIPS: Style/formatting sweep of the decoder itself. | Gabe Black | |
| 2009-07-21 | MIPS: Format the register index constants like the other ISAs. | Gabe Black | |
| Also a few more style fixes. | |||
| 2009-07-21 | Automated merge with ssh://m5sim.org//repo/m5 | Derek Hower | |
| 2009-07-21 | ruby: fixed sequencer RMW data bug | Derek Hower | |
| 2009-07-21 | ruby: libruby_init now takes parsed Ruby-lang config text | Derek Hower | |
| libruby_init now expects to get a file that contains the output of running a ruby-lang configuration, opposed to the ruby-lang configuration itself. | |||
| 2009-07-21 | MIPS: Get MIPS_FS to compile, more style fixes. | Gabe Black | |
| Some breakage was from my BitUnion change, some was much older. | |||
| 2009-07-21 | MIPS: Many style fixes. | Gabe Black | |
| White space, commented out code, some other minor fixes. | |||
| 2009-07-20 | isa_parser: Get rid of the now unused ControlBitfieldOperand. | Gabe Black | |
| 2009-07-20 | MIPS: Use BitUnions instead of bits() functions and constants. | Gabe Black | |
| Also fix style issues in regions around these changes. | |||
| 2009-07-20 | merge | Derek Hower | |
| 2009-07-20 | ruby: moved cache stats from Profiler to CacheMemory | Derek Hower | |
| Caches are now responsible for their own statistic gathering. This requires a direct callback from the protocol on misses, and so all future protocols need to take this into account. | |||
| 2009-07-19 | CPU: Separate out native trace into ISA (in)dependent code and SimObjects. | Gabe Black | |
| --HG-- rename : src/cpu/nativetrace.cc => src/arch/sparc/nativetrace.cc rename : src/cpu/nativetrace.hh => src/arch/sparc/nativetrace.hh rename : src/cpu/NativeTrace.py => src/arch/x86/X86NativeTrace.py | |||
| 2009-07-19 | Tracing: Add accessors so tracers can get at data in trace records. | Gabe Black | |
| 2009-07-19 | X86: Move a displaced comment back to where it goes. | Gabe Black | |
| 2009-07-19 | X86: Add some misc registers for FP control state. | Gabe Black | |
| 2009-07-19 | scons: removed RubyConfig from scons | Derek Hower | |
| 2009-07-18 | ruby: removed all refs to old RubyConfig | Derek Hower | |
| 2009-07-18 | ruby: removed dead files | Derek Hower | |
| 2009-07-18 | ruby: removed dead files | Derek Hower | |
| 2009-07-18 | merge | Derek Hower | |
| 2009-07-18 | ruby: fixed dma sequencer bug | Derek Hower | |
| The DMASequencer was still using a parameter from the old RubyConfig, causing an offset error when the requested data wasn't block aligned. This changeset also includes a fix to MI_example for a similar bug. | |||
| 2009-07-18 | ruby: better debug print for DataBlock | Derek Hower | |
| 2009-07-18 | slicc: made coherence profilers per-controller | Derek Hower | |
| 2009-07-17 | X86: Set up a named constant for the "fold bit" for int register indices. | Gabe Black | |
| 2009-07-17 | X86: Tame the wilds of def operands. | Gabe Black | |
| 2009-07-17 | X86: Shift some register flattening work into the decoder. | Gabe Black | |
| 2009-07-16 | merge | Polina Dudnik | |
| 2009-07-16 | X86: Add range checks for miscreg indexing utility functions. | Gabe Black | |
| 2009-07-16 | X86: Take limitted advantage of the compilers type checking for microop ↵ | Gabe Black | |
| operands. | |||
| 2009-07-16 | X86: Fix a number of places where the wrong form of a microop was used. | Gabe Black | |
| 2009-07-16 | X86: Fix x87 stack register indexing. | Gabe Black | |
| 2009-07-15 | Tester update | Polina Dudnik | |
| 2009-07-14 | Merge with head. | Gabe Black | |
| 2009-07-14 | ARM: Fix the "open" flag constants. | Jack Whitham | |
| 2009-07-13 | Changed the state machine to generate code such that multiple processors can ↵ | Polina Dudnik | |
| make atomic requests at once | |||
| 2009-07-13 | 1. Got rid of unused functions in DirectoryMemory | Polina Dudnik | |
| 2. Reintroduced RMW_Read and RMW_Write 3. Defined -2 in the Sequencer as well as made a note about mandatory queue Did not address the issues in the slicc because remaking the atomics altogether to allow multiple processors to issue atomic requests at once | |||
| 2009-07-13 | merge | Derek Hower | |
| 2009-07-13 | regression: updated memtest-ruby stats | Derek Hower | |
| This also includes a change to the default Ruby random seed, which was previously set using the wall clock. It is now set to 1234 so that the stat files don't change for the regression tester. | |||
| 2009-07-13 | Changes to add tracing and replaying command-line options | Polina Dudnik | |
| Trace is automatically ended upon a manual checkpoint | |||
| 2009-07-13 | Locked requests should actually be converted to ST rather than ATOMIC, ↵ | Polina Dudnik | |
| because ATOMIC is for RMW. | |||
| 2009-07-13 | Added atomics implementation which would work for MI_example | Polina Dudnik | |
| 2009-07-13 | Minor fixes for compiling | Polina Dudnik | |
| 2009-07-13 | Replaced RMW with Locked. RMW will be used for the coherence-aided atomics ↵ | Polina Dudnik | |
| other than LLSC | |||
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index : gem5 | |
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