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AgeCommit message (Expand)Author
2007-04-22Make the floating point zero register special handling only apply for ALPHA.Gabe Black
2007-04-22Make the GSR into a renamed control register. It should be split into a renam...Gabe Black
2007-04-18Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/newmemGabe Black
2007-04-18Move the turbolaser python simobject stuff into theNathan Binkert
2007-04-18fix SIGUSR1 and SIGUSR2 by clearing the variables afterNathan Binkert
2007-04-17Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/newmemGabe Black
2007-04-15Make an inner loop which pulls microops out of macroops. These aren't checked...Gabe Black
2007-04-15Add extra constructors to Alpha and MIPSGabe Black
2007-04-14Add support for microcode and pull out the special branch delay slot handling...Gabe Black
2007-04-14Make register indexes larger so they can actually hold all the legal values. ...Gabe Black
2007-04-14Make the fsr a serializing register. Other control registers probably need th...Gabe Black
2007-04-13Remove most of the special handling for delay slots since they have to be squ...Gabe Black
2007-04-12Completely re-work how the scons framework incorporates swigNathan Binkert
2007-04-12Don't allow Source to accept multiple arguments, lists,Nathan Binkert
2007-04-12Fix NextEthernetAddr.Nathan Binkert
2007-04-12Add a scons hack to force symlinks to the swig .i filesNathan Binkert
2007-04-11Merge zizzer.eecs.umich.edu:/bk/newmemGabe Black
2007-04-11Make trying to execute macroops fail with a better error message.Gabe Black
2007-04-11Create a filter and a union to translate the SPARC instruction implementation...Gabe Black
2007-04-10Merge zizzer.eecs.umich.edu:/bk/newmemGabe Black
2007-04-10Even if you don't want to fetch more bytes, make sure you handle a fault.Gabe Black
2007-04-10Include the new GenFault microop.Gabe Black
2007-04-10Reworked x86 a bitGabe Black
2007-04-10Changed some instruction names to be in all caps, and "implemented" move to t...Gabe Black
2007-04-10Added a class which lets you manipulate all the strings returned by the parse...Gabe Black
2007-04-10Fix up the base x86 fault object and create a fault to be generated by unimpl...Gabe Black
2007-04-10Fixed a compile error.Gabe Black
2007-04-09Comment out the remote gdb object for SE mode.Gabe Black
2007-04-09Merge ktlim@zizzer:/bk/newmemKevin Lim
2007-04-09Fix bug when blocking due to no free registers.Kevin Lim
2007-04-09Merge zizzer.eecs.umich.edu:/bk/newmemGabe Black
2007-04-09Accidentally didn't save when moving the specialization code out of here.Gabe Black
2007-04-08Take into account that the flattened integer register space is a different si...Gabe Black
2007-04-08Merge zizzer.eecs.umich.edu:/bk/newmemGabe Black
2007-04-08Get the "hard" SPARC instructions working in o3. I don't like that the IsStor...Gabe Black
2007-04-06Move the instruction specialization stuff out of the microassembler file, and...Gabe Black
2007-04-06Merge zizzer.eecs.umich.edu:/bk/newmemGabe Black
2007-04-06Consolidated the microcode assembler to help separate it from more x86-centri...Gabe Black
2007-04-06Refactored the x86 isa description some more. There should be more seperation...Gabe Black
2007-04-06Clean up the code a little, fix (I think) a perceived problem with immediate ...Gabe Black
2007-04-06Add in a stub merging functionGabe Black
2007-04-06Clean up the macroop code.Gabe Black
2007-04-06Merge zizzer.eecs.umich.edu:/bk/newmemGabe Black
2007-04-05Merge zizzer.eecs.umich.edu:/bk/newmemGabe Black
2007-04-04The process of going from an instruction definition to an instruction to be r...Gabe Black
2007-04-04Fix a regular expression problem when recognizing labels for string substitut...Gabe Black
2007-04-04Merge zizzer.eecs.umich.edu:/bk/newmemGabe Black
2007-04-04Updates for other ISA cpu_builders.Kevin Lim
2007-04-04Merge ktlim@zizzer:/bk/newmemKevin Lim
2007-04-04Pass ISA-specific O3 CPU as a constructor parameter instead of using setCPU f...Kevin Lim
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