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2008-06-12X86: Fix a byte register indexing issue in the sign extending move from ↵Gabe Black
memory microcode.
2008-06-12X86: Add in some support for the tsc register.Gabe Black
2008-06-12CPU: Make the simple cpu trace data for loads/stores.Gabe Black
2008-06-11X86: Fix building on *BSD hostsAli Saidi
2008-06-11SCons: Fix more SCons version issuesAli Saidi
2008-05-20IGbE: Implement sending packet that is contained in more than 2 descriptors.Ali Saidi
--HG-- extra : convert_revision : 8fb7d5fad5cb840f69c31aa8b331dbe09e46ee9d
2008-05-20SCons: Fixing SCons bug 2006 issues for non-alpha ISAsStephen Hines
--HG-- extra : convert_revision : 26e3edef06d6f82aaf162825c151d18faadd6e72
2008-05-15Make sure that output files are always checked success before they're used.Ali Saidi
Make OutputDirectory::resolve() private and change the functions using resolve() to instead use create(). --HG-- extra : convert_revision : 36d4be629764d0c4c708cec8aa712cd15f966453
2008-05-06SCons: More scons fixing for SCons bug 2006Ali Saidi
--HG-- extra : convert_revision : d3656ab1e3c18251d4bcf6f5a31103d4b2dfdc43
2008-04-10SCons: add comments to SConscript documenting bug workaroundAli Saidi
--HG-- extra : convert_revision : e6cdffe953d56b96c76c7ff14d2dcc3de3ccfcc3
2008-04-10PhysicalMemory: Add parameter for variance in memory delay.Ali Saidi
--HG-- extra : convert_revision : b931472e81dedb650b7accb9061cb426f1c32e66
2008-04-08SCons: Manually specifying header only directories with Dir() works around ↵Ali Saidi
the problem --HG-- extra : convert_revision : d9713228d934cf4a45114a972603b8bca2bd27d3
2008-03-25IGbE: Fix bug that limits wire performance a bitAli Saidi
--HG-- extra : convert_revision : 3f93c17f647a6955dab861da211174de856ee02c
2008-03-25Automated merge with ssh://daystrom.m5sim.org//repo/m5Steve Reinhardt
--HG-- extra : convert_revision : 7922848bb1145bcb2ee07d672d21cfe2dd98fc03
2008-03-25Fix handling of writeback-induced writebacks in atomic mode.Steve Reinhardt
--HG-- extra : convert_revision : 4fa64f8a929f1aa36a9d5a71b8d1816b497aca4c
2008-03-25X86: Put an RTC into the CMOS part of the southbridge.Gabe Black
--HG-- extra : convert_revision : a614373236fe75db6e6181fc152a02b541a131f3
2008-03-25Devices: Separate out the MC146818 RTC so both Alpha and X86 can use it.Gabe Black
--HG-- extra : convert_revision : 1e7f5185654ed0845678c2169c702d3b977159ed
2008-03-25X86: Turn #defines into consts.Gabe Black
--HG-- extra : convert_revision : c0416de5d88ca39f54494418768e68a93aa4f2aa
2008-03-25X86: Start implementing the south bridge stuff.Gabe Black
--HG-- extra : convert_revision : 92918c05eb3363155d78889bdab17baa8eae9dca
2008-03-25X86: Change the Opteron platform to be the PC platform.Gabe Black
--HG-- extra : convert_revision : 2c6ffebbad04a21cef6ba3fbc1803218908a6c37
2008-03-24Delete the Request for a no-response PacketSteve Reinhardt
when the Packet is deleted, since the requester can't possibly do it. --HG-- extra : convert_revision : 8571b144ecb3c70efc06d09faa8b3161fb58352d
2008-03-24Don't FastAlloc MSHRs since we don't allocate them on the fly.Steve Reinhardt
--HG-- extra : convert_revision : 02775cfb460afe6df0df0938c62cccd93a71e775
2008-03-24Add FAST_ALLOC_DEBUG and FAST_ALLOC_STATS as SConstruct options.Steve Reinhardt
--HG-- extra : convert_revision : 56a7f646f2ac87019c78ba7fa62c5f4bdc00ba44
2008-03-22Fix cache problem with writes to tempBlockSteve Reinhardt
getting wrong writeback address. --HG-- extra : convert_revision : 023dfb69c227c13a69bfe2744c6af75a45828b0b
2008-03-20MIPS: Check endianness of binaries in SE mode.Gabe Black
--HG-- extra : convert_revision : e6c4bda6078eb68a26f8834411f744078c6bf5a9
2008-03-17Fix a few Packet memory leaks.Steve Reinhardt
--HG-- extra : convert_revision : 00db19f0698c0786f0dff561eea9217860a5a05a
2008-03-17Restructure bus timing calcs to cope with pkt being deleted by target.Steve Reinhardt
--HG-- extra : convert_revision : db8497e73a44f2a06aab121e797e88b4c0c31330
2008-03-15Fix subtle cache bug where read could return stale dataSteve Reinhardt
if a prior write miss arrived while an even earlier read miss was still outstanding. --HG-- extra : convert_revision : 4924e145829b2ecf4610b88d33f4773510c6801a
2008-03-06MergeGabe Black
--HG-- extra : convert_revision : ec5f41b2007ade15f6f4c4a1533e50f9cba2798e
2008-03-06X86: Refine the local APIC.Gabe Black
--HG-- extra : convert_revision : 2789c54ed555fed2f2a333fcc7dc6454f294ebf2
2008-03-06O3CPU: Don't call dumpInsts if DEBUG is not definedVilas Sridharan
--HG-- extra : convert_revision : 3194bde4c624d118969bfbf92282539963a72245
2008-03-01X86: Don't map the local APIC into the physical address space in SE mode.Gabe Black
--HG-- extra : convert_revision : b7103974b12130bbf43583c4cb5294b808add208
2008-02-27Automated merge with ssh://daystrom.m5sim.org//repo/m5Steve Reinhardt
--HG-- extra : convert_revision : f4bcd342e7abb86ca83840b723e6ab0b861ecf5b
2008-02-27Add comments in code to describe bug conditions.Korey Sewell
This should help if somebody gets to the bug fix before me (or someone else)... --HG-- extra : convert_revision : 0ae64c58ef4f7b02996f31e9e9e6bfad344719e2
2008-02-27Fix Load/Store Queue squashing after a SMT thread is removed but ensuringKorey Sewell
you are squashing from the current instruction # causing the thread exit. --HG-- extra : convert_revision : ccbeece7dd1d5fee43f30ab19370908972113473
2008-02-27Fix offset in removeThread() function so that float registers start freeing upKorey Sewell
from the right point (#32 usually) instead of restarting at 0 and double-freeing. Commented out assert line in free_list.hh that will check for when double-free condition goes bad. --HG-- extra : convert_revision : 08d5f9b6a874736e487d101e85c22aaa67bf59ae
2008-02-26Revamp cache timing access mshr check to make stats sane again.Steve Reinhardt
--HG-- extra : convert_revision : 37009b8ee536807073b5a5ca07ed1d097a496aea
2008-02-27Configs: Make using Simpoints easier with some config files that support ↵Rick Strong
them easily --HG-- extra : convert_revision : 0f21829306eb68b332f03da410e6c341c8595bdd
2008-02-26X86: Put in initial implementation of the local APIC.Gabe Black
--HG-- extra : convert_revision : 1708a93d96b819e64ed456c75dbb5325ac8114a8
2008-02-26X86: Implement the INVLPG instruction and the TIA microop.Gabe Black
--HG-- extra : convert_revision : 31db1ee082f6c3ca5443cba1eb335e408661ead2
2008-02-26TLB: Make a TLB base class and put a virtual demapPage function in it.Gabe Black
--HG-- extra : convert_revision : cc0e62a5a337fd5bf332ad33bed61c0d505a936f
2008-02-26X86: Get PCI config space to work, and adjust address space prefix numbering ↵Gabe Black
scheme. --HG-- extra : convert_revision : 2b382f478ee8cde3a35aa4c105196f200bc7afa6
2008-02-26Cache: better comments particularly regarding writeback situation.Steve Reinhardt
--HG-- extra : convert_revision : 59ff9ee63ee0fec5a7dfc27b485b737455ccf362
2008-02-26Bus: Fix the bus timing to be more realistic.Gabe Black
--HG-- extra : convert_revision : acd70dc98ab840e55b114706fbb6afb2a95e54bc
2008-02-16Make L2+ caches allocate new block for writeback missesSteve Reinhardt
instead of forwarding down the line. --HG-- extra : convert_revision : b0d6e7862c92ea7a2d21f817d30398735e7bb8ba
2008-02-14CPU: move the PC Events code to a place where the code won't be executed ↵Ali Saidi
multiple times if an instruction faults. --HG-- extra : convert_revision : 19c8e46a4eea206517be7ed4131ab9df0fe00e68
2008-02-11Update copyright datesAli Saidi
--HG-- extra : convert_revision : 547e7ddff6b8005a9eaad60970bc51984e84fcd1
2008-02-11Automated merge with file:/home/stever/hg/m5-origSteve Reinhardt
--HG-- extra : convert_revision : 86a55cd98a9704f756a70aa0cbd2820cf92c821d
2008-02-11EXTRAS now points to src instead of needing 'src' subdir.Steve Reinhardt
--HG-- extra : convert_revision : 8e7e4516ace8c7852eeea3c479bfd567839a8061
2008-02-10Bus: Only update port cache when there is an item to update it with.Nicolas Zea
--HG-- extra : convert_revision : 84848fd48bb9e6693a0518c862364142b1969aa8
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