Age | Commit message (Collapse) | Author |
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into vm1.(none):/home/stever/bk/newmem-cache2
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extra : convert_revision : 9002940097a166c8442ae1adf41b974227968920
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configs/example/memtest.py:
Add progress interval option.
src/base/traceflags.py:
Add MemTest flag.
src/cpu/memtest/memtest.cc:
Clean up tracing.
src/cpu/memtest/memtest.hh:
Get rid of unused code.
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extra : convert_revision : 92bd8241a6c90bfb6d908e5a5132cbdb500cbb87
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don't spend so much time calling malloc()
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extra : convert_revision : a946564eee46ed7d2aed41c32d488ca7f036c32f
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extra : convert_revision : 99053414cef40f13c5226871a72909b2622d8c26
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displacement.
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extra : convert_revision : aabaaf099f070832bf42cedf2472170e0738ee1c
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into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86
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extra : convert_revision : f2fac2b1a09e709021cd8382a9fbe805df2177ef
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extra : convert_revision : 514032e21c8861f20fcbcae7204e132088cc7dbc
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Caused slowdown in performance instead of speeding up.
src/cpu/base.cc:
Removed "adding instead of dividing" trick.
src/mem/bus.cc:
Fixed spelling in comments.
Removed "adding instead of dividing" trick.
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extra : convert_revision : 65a736f4f09a64e737dc7aeee53b117976330488
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extra : convert_revision : 1c920b050c21e592a386410e4e9f45354f8e4441
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supposed to and make sure parameters have the right type.
Also make sure that any object that should be an intermediate
type has the right options set.
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extra : convert_revision : d56910628d9a067699827adbc0a26ab629d11e93
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extra : convert_revision : ec73c3c8788757990a6fab8c600f3b353d0d4206
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an lea microop, move EmulEnv into it's own .cc and .hh.
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extra : convert_revision : 1212b8463eab1c1dcba7182c487d1e9184cf9bea
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the MOVSXD instruction.
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extra : convert_revision : 7542f130b269a6a09e6ed51ae4689d1faa45a155
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is probably fine as far as the predecoder goes, but the simple cpu might want to not refetch something it already has. That reintroduces the self modifying code problem though.
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extra : convert_revision : 802197e65f8dc1ad657c6b346091e03cb563b0c0
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64 bit mode. Also add in more versions of PUSH and POP, and a version of near CALL.
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extra : convert_revision : 7d8266cdfa54ac25610466b3533d3e9e5433297b
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extra : convert_revision : dc9d67dd5413f00f16d37cb2d0f8b0d10971e14a
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reimplemented. The comments are basically functioning like a todo list.
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extra : convert_revision : cb07e3813f6cf882b4a5c77c498ffbca26adf586
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into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86
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extra : convert_revision : 2dfc24b0720b3b378858a289e4bb6f4ee7132b3d
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and use them directly out of the instruction. The extra copies are conceptually realistic but are just innefficient as implemented. Also don't use the zeroeth microcode register for general storage since it's now the zero register, and implement a load and a store microops.
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extra : convert_revision : 0686296ca8b72940d961ecc6051063bfda1e932d
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the time it was repsonded to. In timing mode the
time it was responded to is curTick. Doesn't change the results, but it does make implementation of nextCycle() more difficult
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extra : convert_revision : 67ed6261a5451d17d96d5df45992590acc353afc
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into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86
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extra : convert_revision : fd64f2de0051afdc51e833a7cbf7fa120b230cc3
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extra : convert_revision : 0df9a12788b8ce3225c113c095d5f13e49a7c544
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registers, and fill out microcode disassembly.
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extra : convert_revision : 56332b3999a9079b1bd305ee2826abdf593367e1
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into vm1.(none):/home/stever/bk/newmem-cache2
configs/example/memtest.py:
Hand merge redundant changes.
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extra : convert_revision : a2e36be254bf052024f37bcb23b5209f367d37e1
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timing mode still broken.
configs/example/memtest.py:
Revamp options.
src/cpu/memtest/memtest.cc:
No need for memory initialization.
No need to make atomic response... memory system should do that now.
src/cpu/memtest/memtest.hh:
MemTest really doesn't want to snoop.
src/mem/bridge.cc:
checkFunctional() cleanup.
src/mem/bus.cc:
src/mem/bus.hh:
src/mem/cache/base_cache.cc:
src/mem/cache/base_cache.hh:
src/mem/cache/cache.cc:
src/mem/cache/cache.hh:
src/mem/cache/cache_blk.hh:
src/mem/cache/cache_builder.cc:
src/mem/cache/cache_impl.hh:
src/mem/cache/coherence/coherence_protocol.cc:
src/mem/cache/coherence/coherence_protocol.hh:
src/mem/cache/coherence/simple_coherence.hh:
src/mem/cache/miss/SConscript:
src/mem/cache/miss/mshr.cc:
src/mem/cache/miss/mshr.hh:
src/mem/cache/miss/mshr_queue.cc:
src/mem/cache/miss/mshr_queue.hh:
src/mem/cache/prefetch/base_prefetcher.cc:
src/mem/cache/tags/fa_lru.cc:
src/mem/cache/tags/fa_lru.hh:
src/mem/cache/tags/iic.cc:
src/mem/cache/tags/iic.hh:
src/mem/cache/tags/lru.cc:
src/mem/cache/tags/lru.hh:
src/mem/cache/tags/split.cc:
src/mem/cache/tags/split.hh:
src/mem/cache/tags/split_lifo.cc:
src/mem/cache/tags/split_lifo.hh:
src/mem/cache/tags/split_lru.cc:
src/mem/cache/tags/split_lru.hh:
src/mem/packet.cc:
src/mem/packet.hh:
src/mem/physical.cc:
src/mem/physical.hh:
src/mem/tport.cc:
More major reorg. Seems to work for atomic mode now,
timing mode still broken.
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extra : convert_revision : 7e70dfc4a752393b911880ff028271433855ae87
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No need to initialize memory contents; should come up as 0.
src/cpu/memtest/memtest.cc:
No need to initialize memory contents; should come up as 0.
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extra : convert_revision : 1713676956f3d33b4686fee2650bd17027bcc495
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extra : convert_revision : e8a894c2f7901329bd390a4cfd92209d0e29cf80
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in place to handle this in the future.
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extra : convert_revision : 2c5bd719c770d9a93a57bd29782842f82384863d
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extra : convert_revision : ab76b11c2bb2f3abc0e7a84f7167d92d16ed074e
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the operand types they expect.
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extra : convert_revision : f9c8e694a8c0eb33b988657dca03ab495b65bee8
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extra : convert_revision : 3f04036d598b6572bab6ec06d162b97564a6529c
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into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86
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extra : convert_revision : ba718de4d676f6d0bd80c29de46be1f6a2f73feb
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Make code compatible with new decode method.
src/arch/alpha/remote_gdb.cc:
src/cpu/base_dyn_inst_impl.hh:
src/cpu/exetrace.cc:
src/cpu/simple/base.cc:
Make code compatible with new decode method.
src/cpu/static_inst.cc:
src/cpu/static_inst.hh:
Modified instruction decode method.
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extra : convert_revision : a9a6d3a16fff59bc95d0606ea344bd57e71b8d0a
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constructor. The intention is to allow them to modify the emulation environment struct before it's used to construct its microops.
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extra : convert_revision : b04fc9ead8e3322fc3af3f14d75e2206ddfbe561
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up \s correctly.
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extra : convert_revision : b4b790fb8cfd2a9e28568cf978eca70b1c65806b
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extra : convert_revision : 8af0dd9c16e7db8ed92f7a71c396841d5ae7e072
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"moreBytes" which just takes a MachInst.
src/arch/x86/predecoder.cc:
Seperate the pc-pc and the pc of the incoming bytes, and get rid of the "moreBytes" which just takes a MachInst. Also make the "opSize" field describe the number of bytes and not the log of the number of bytes.
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extra : convert_revision : 3a5ec7053ec69c5cba738a475d8b7fd9e6e6ccc0
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