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AgeCommit message (Expand)Author
2006-11-01Merge zizzer.eecs.umich.edu:/bk/newmem/Gabe Black
2006-11-01Added code to handle draining.Gabe Black
2006-11-01Fix a range check on the ipr_index.Gabe Black
2006-11-01Adjustments for the AlphaTLB changing to AlphaISA::TLB and changing register ...Gabe Black
2006-10-31Arg!Gabe Black
2006-10-31More typos! I need to get nfs to work.Gabe Black
2006-10-31Fix another typoGabe Black
2006-10-31Check for out of range IPR values as well.Gabe Black
2006-10-31Fix stupid typoGabe Black
2006-10-31Make two simple utility functions to determine if a MiscReg index correspondi...Gabe Black
2006-10-31We don't include ipr.cc in SE builds, so don't call it.Gabe Black
2006-10-31Made the old name refer to the miscreg index to prevent having to change code...Gabe Black
2006-10-31Forgot to change the index.Gabe Black
2006-10-31Make the IPRs use regular miscreg indexes, and make a table or two to find th...Gabe Black
2006-10-31Merge ktlim@zizzer:/bk/newmemKevin Lim
2006-10-31Remove mem parameter. Now the translating port asks the CPU's dcache's peer ...Kevin Lim
2006-10-31Ports now have a pointer to the MemObject that owns it (can be NULL).Kevin Lim
2006-10-31remove connectAll() and connect() code since it isn't used anymore. (The pyth...Ali Saidi
2006-10-31add the ability to insert into the middle of the timing port send listAli Saidi
2006-10-31Missed a few instances of this function.Gabe Black
2006-10-31Get rid of old, commented out code.Gabe Black
2006-10-31Move IntrFlag into the MiscRegFile and get rid of specialized accessor functi...Gabe Black
2006-10-31Put the Alpha tlb stuff into the AlphaISA namespace, and give the classes mor...Gabe Black
2006-10-29An attempt to serialize the state of the micro code mechanism in the simple cpu.Gabe Black
2006-10-29Move the mem classes into util.isa so that multiple inheritance can be used i...Gabe Black
2006-10-29Fix when the IsDelayedCommit flag is set.Gabe Black
2006-10-29Bring casa and casxa up to dateGabe Black
2006-10-29Fixed ldstub to use the right format, and made the load/store operations use ...Gabe Black
2006-10-29Add an integer microcode register.Gabe Black
2006-10-28Merge zizzer:/bk/newmemAli Saidi
2006-10-28remove intel nic from SConscriptAli Saidi
2006-10-28This one really needs to be arch/faults.hhGabe Black
2006-10-28Include the right version of faults.hhGabe Black
2006-10-28Merge zizzer.eecs.umich.edu:/bk/newmemGabe Black
2006-10-28One last adjustment to get rid of skew in the simple atomic cpu.Gabe Black
2006-10-27add packet_access.hhAli Saidi
2006-10-27A more complete attempt to fix the clock skew.Gabe Black
2006-10-27Potential fix to clock skew problem.Gabe Black
2006-10-27Merge zizzer.eecs.umich.edu:/bk/newmemGabe Black
2006-10-27Got rid of some outdated comments.Gabe Black
2006-10-27Made the regfile compatible with the new definitions in MiscRegFileGabe Black
2006-10-27Clean up MiscRegFileGabe Black
2006-10-26Reorganized the MiscRegFileGabe Black
2006-10-26Cleaned up the decoder slightly.Gabe Black
2006-10-26Added a few functions to stuff values into bitfields in an instruction.Gabe Black
2006-10-26Changed the number of register windows to be more realistic.Gabe Black
2006-10-26Got rid of some debug outputGabe Black
2006-10-26Change the default function from setMiscRegWithEffect to setMiscRegGabe Black
2006-10-26Merge zizzer:/bk/newmemAli Saidi
2006-10-25Fix simple timing port keep a list of all packets, have only one event, and s...Ali Saidi
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