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Even though we're not incorrect about operator precedence, let's add
some parens in some particularly confusing places to placate GCC 4.3
so that we don't have to turn the warning off. Agreed that this is a
bit of a pain for those users who get the order of operations correct,
but it is likely to prevent bugs in certain cases.
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We should always refer to the specific ISA in that arch directory.
This is especially necessary if we're ever going to make it to the
point where we actually have heterogeneous systems.
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We're never going to do an alpha platform other than the one we've got.
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Fix the logic in the LSQ that determines if there are any stores to
write back. In the commit stage, check for thread specific writebacks
instead of just any writeback.
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Just check CPU's nextPC before and after syscall and if it changes,
update this instruction's nextPC because the syscall must have changed
the nextPC.
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The translate function simplifies code and removes some compiler
warnings in gcc 3.4
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Swig code isn't quite perfect, so let's not turn on all of the warnings.
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In the future, it would be nice to put the O3CPU into its own
namespace so that we don't end up hardcoding pointers to the global
namespace.
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These functions keep trying to read and write until all data has been
transferred, or an error occurrs. In the case where an end of file
hasn't been reached, but all of the bytes have not been read/written,
try again. On EINTR, try again.
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We haven't used the preprocessor feature of the inifile stuff in a
very long time, so let's get rid of it since it would otherwise take
effort to maintain.
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should configure their editors to not insert tabs
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Remove a bunch of unused cruft from the interface while we're at it
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registers.
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same packet again.
It doesn't cause a problem currently, however with a different Memory Object it could cause
problems
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done to be consistent with its
python type of a latency. In addition, the multiple definitions of profile in the different cpu models caused
problems for intialization of the interval value. If a child class's profile value was defined, the parent
BaseCPU::ProfileEvent interval field would be initialized with a garbage value. The fix was to remove the
multiple redifitions of profile in the child CPU classes.
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starts/ends as well as after read/write dmas
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actually finished.
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postedInterrupts statistics.
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don't support fetching from uncached addresses in Alpha and it means that a speculative fetch can clobber device registers.
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A whole bunch of stuff has been converted to use the new params stuff, but
the CPU wasn't one of them. While we're at it, make some things a bit
more stylish. Most of the work was done by Gabe, I just cleaned stuff up
a bit more at the end.
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Also make -B output consistent with normal header, and
only include actual build options.
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(except for warn()) and new -r/-e options make it
not worth fixing.
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Better than using shell since it automatically uses -d directory
for output files (creating it as needed).
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When invoking several copies of m5 on the same machine at the same
time, there can be a race for TCP ports for the terminal connections
or remote gdb. Expose a function to disable those ports, and have the
regression scripts disable them. There are some SimObjects that have
no other function than to be used with ports (NativeTrace and
EtherTap), so they will panic if the ports are disabled.
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This should allow m5 to be more easily embedded into other simulators.
The m5 binary adds a simple main function which then calls into the m5
libarary to start the simulation. In order to make this work
correctly, it was necessary embed python code directly into the
library instead of the zipfile hack. This is because you can't just
append the zipfile to the end of a library the way you can a binary.
As a result, Python files that are part of the m5 simulator are now
compile, marshalled, compressed, and then inserted into the library's
data section with a certain symbol name. Additionally, a new Importer
was needed to allow python to get at the embedded python code.
Small additional changes include:
- Get rid of the PYTHONHOME stuff since I don't think anyone ever used
it, and it just confuses things. Easy enough to add back if I'm wrong.
- Create a few new functions that are key to initializing and running
the simulator: initSignals, initM5Python, m5Main.
The original code for creating libm5 was inspired by a patch Michael
Adler, though the code here was done by me.
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Simply cast the result to an int and life is good.
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Also update stats to reflect change.
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I decided that separating some of the scons code into generate.py was
just a bad idea because it caused the dependency system to get all
messed up. If separation is the right way to go in the future, we
should probably use the sconscript mechanism, not the mechanism that I
just removed.
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