gem5 - gem5

Age	Commit message (Expand)	Author
2011-03-17	Automated merge with ssh://hg@repo.m5sim.org/m5	Ali Saidi
2011-03-17	ARM: Add minimal ARM_SE support for m5threads.	Chris Emmons
2011-03-17	ARM: Fix subtle bug in LDM.	Ali Saidi
2011-03-17	ARM: Implement the Instruction Set Attribute Registers (ISAR).	Ali Saidi
2011-03-17	ARM: Identify branches as conditional or unconditional and direct or indirect.	Ali Saidi
2011-03-17	ARM: Fix small bug with VLDM/VSTM instructions.	Ali Saidi
2011-03-17	ARM: Detect and skip udelay() functions in linux kernel.	Ali Saidi
2011-03-17	ARM: Allow conditional quiesce instructions.	Ali Saidi
2011-03-17	ARM: Fix RFE macrop.	Matt Horsnell
2011-03-17	ARM: Rename registers used as temporary state by microops.	Matt Horsnell
2011-03-17	O3: Send instruction back to fetch on squash to seed predecoder correctly.	Ali Saidi
2011-03-17	O3: Cleanup the commitInfo comm struct.	Ali Saidi
2011-03-17	ARM: Previous change didn't end up setting instFlags, this does.	Ali Saidi
2011-03-17	Mem: Fix issue with dirty block being lost when entire block transferred to n...	Ali Saidi
2011-03-17	O3: Fix unaligned stores when cache blocked	Ali Saidi
2011-03-17	Ruby: minor bugfix, line did not adhere to some macro usage conventions.	Lisa Hsu
2011-03-17	Ruby: expose a simple mod function in slicc interface.	Lisa Hsu
2011-03-11	SCons: Stop embedding the mercurial revision into the binary.	Gabe Black
2011-03-11	Gems: Eliminate the now unused GEMS_ROOT scons variable.	Gabe Black
2011-03-11	Ruby: Get rid of the dead ruby tester.	Gabe Black
2011-03-08	Alpha: Fix the datatypes of some values read from the simulated kernel.	Yi Xiang
2011-03-03	SCons: Clean up some inconsistent capitalization in scons options.	Gabe Black
2011-03-02	X86: Use the npc as the pc when doing a nativetrace, not what M5 considers th...	Gabe Black
2011-03-02	X86: Decode the mysterious and elusive ffreep x87 instruction.	Gabe Black
2011-03-01	Spelling: Fix the a spelling error by changing mmaped to mmapped.	Gabe Black
2011-03-01	X86: Mark IO reads and writes as non-speculative.	Gabe Black
2011-03-01	X86: Mark prefetches as such in their instruction and request flags.	Gabe Black
2011-03-01	Ruby: Fix DPRINTF bugs in PerfectSwitch and MessageBuffer	Nilay Vaish
2011-03-01	Ruby: Mention that Ruby's bound checking option only applies to Ruby.	Gabe Black
2011-02-27	X86: If PCI config space is disabled, pass through to regular IO addresses.	Gabe Black
2011-02-27	X86: Use regular read requests in the walker instead of read exclusive.	Gabe Black
2011-02-26	getopt: Remove GPL code.	Nathan Binkert
2011-02-25	Ruby: Remove store buffer	Nilay Vaish
2011-02-25	Ruby: Remove libruby	Nilay Vaish
2011-02-25	Ruby: Make Address.hh independent of RubySystem	Nilay Vaish
2011-02-25	Ruby: Make DataBlock.hh independent of RubySystem	Nilay Vaish
2011-02-25	O3CPU: Fix iqCount and lsqCount SMT fetch policies.	Timothy M. Jones
2011-02-23	ruby: automate permission setting	Brad Beckmann
2011-02-23	MOESI_hammer: cache probe address clean up	Brad Beckmann
2011-02-23	ruby: cleaned up access permission enum	Brad Beckmann
2011-02-23	ruby: removed unsupported protocol files	Brad Beckmann
2011-02-23	inorder: InstSeqNum bug	Korey Sewell
2011-02-23	inorder: dyn inst initialization	Korey Sewell
2011-02-23	inorder: cache packet handling	Korey Sewell
2011-02-23	Mem: Print out memory when access > 8 bytes	Ali Saidi
2011-02-23	ARM: Set ITSTATE correctly after FlushPipe	Ali Saidi
2011-02-23	ARM: This panic can be hit during misspeculation so it can't exist.	Ali Saidi
2011-02-23	ARM: Bad interworking warn way to noisy when running real code w/misspeculation.	Ali Saidi
2011-02-23	O3: When a prefetch causes a fault, don't record it in the inst	Ali Saidi
2011-02-23	ARM: NEON instruction templates modified to set the predicate flag to false w...	Giacomo Gabrielli