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2018-10-02arch: Fix unserialization of VectorReg valueGabor Dozsa
Change-Id: Iba01ae60e10703877eae299ba924fa1f04a4a387 Signed-off-by: Giacomo Gabrielli <giacomo.gabrielli@arm.com> Reviewed-on: https://gem5-review.googlesource.com/13104 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2018-10-02arch-arm: Add FP16 support and other primitives to fplibEdmund Grimley Evans
This changeset: - extends fplib to support emulation of half-precision floating-point (FP16) operations; - extends fplib to support additional primitives introduced by the Arm Scalable Vector Extension (SVE) (fplibExpa, fplibScale, fplibTrigMAdd, fplibTrigSMul, fplibTrigSSel); - adds the FZ16 bit to FPSCR; - cleans up fplib code by replacing constants with preprocessor macros and by adding inline functions to recognise NaNs and infinities. Change-Id: If8fdb2a5824b478c8310bbc126ec60cc1105f135 Signed-off-by: Giacomo Gabrielli <giacomo.gabrielli@arm.com> Reviewed-on: https://gem5-review.googlesource.com/13044 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2018-10-01arch-arm: Implement AArch64 ID regs as bitunionsGiacomo Travaglini
This patch is implementing the following AArch64 ID registers as bitunions, so that it is easier to query for feature availability: - ID_AA64DFR0_EL1 - ID_AA64ISAR0_EL1 - ID_AA64ISAR1_EL1 - ID_AA64MMFR1_EL1 - ID_AA64MMFR2_EL1 - ID_AA64PFR0_EL1 They are updated to the latest Armv8.5 arch release version. RES0 only ID registers like ID_AA64AFR1_EL1 haven't been added. Change-Id: Ied037abe3757421bcfc2834d397a8cf9a2b9f0a7 Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/13067 Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2018-10-01arch-arm: Implement AArch64 ID_AA64MMFR2_EL1 registerGiacomo Travaglini
This patch implements AArch64 Memory Model Feature Register 2 (from ARMv8.2) Change-Id: I16d9acaf620fac6d1206e208bd143daec1657daf Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/13066 Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2018-10-01arch-arm: Move MiscReg BitUnions into a separate header fileGiacomo Travaglini
As the number of MiscRegs increases there is the need of a cleaner header file; this patch is separating miscreg.[cc,hh] where the miscreg decoding/utility functions are defined/declared from the MiscReg register types (BitUnion). Change-Id: I815f53b117b50e47f93aa13d78356ef09d2a2541 Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/13065 Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2018-10-01arch-arm: Init AArch64 ID registers in SE modeGiacomo Travaglini
One of the auxv vector's flag is the HWCAP, whose bits match the content of several arm ID registers. This patch factors out AArch64 ID registers init into a separate method and creates the symmetric AArch32 ID register init as well, so that we get a meaningful auxiliary vector in SE mode. Change-Id: I52bdb31b67508c4447558ebd7ca743733a69280e Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/13064 Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2018-10-01cpu: Fix typo in header guard for Noncaching cpuGiacomo Travaglini
Change-Id: If8ec5f5f49e99d4989658273723b943dd8df84c6 Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/13144 Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2018-10-01dev-arm: Enable FIQ signaling for Group0 interrupts in GICv2Giacomo Travaglini
Change-Id: Iafaf26344a26eade60c08dd2c0d716af14d9b328 Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-on: https://gem5-review.googlesource.com/12948 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2018-10-01dev-arm: Create postFiq events for GICv2Giacomo Travaglini
GICv2 is signaling IRQs only to the CPU. This patch is adding the capability of scheduling FIQs. Change-Id: I395afc83eb8d58cfd32cd93372bcb6f804364ef5 Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-on: https://gem5-review.googlesource.com/12947 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2018-10-01dev-arm: Implement GICv2 GICD_IGROUPR registerGiacomo Travaglini
This patch is implementing GICD_IGROUPR register. Change-Id: I1626f61fbf7deec9c81d8d2c135f1d6c0c4eb891 Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-on: https://gem5-review.googlesource.com/12946 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2018-10-01dev-arm: Fix GICv2 cpu interrupt enable flagGiacomo Travaglini
Read/WriteCpu methods in the GICv2 are accessing the GICC_CTRL register as if writing any non-zero value to the register will enable IRQ signaling to the CPU. Instead, only the 2 least significant bits control group0/group1 enablement. This patch is renaming GICC_CTRL underlying data buffer from cpuEnabled to cpuControl and it is making it an array of uint32_t instead of bool. cpuEnabled now becomes a method and checks if GICC_CTRL.EnableGrp0 or GICC_CTRL.EnableGrp0 are set. Change-Id: I40f0b3c52c40abd482a856f032bf3686f96ef641 Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-on: https://gem5-review.googlesource.com/12945 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2018-10-01dev-arm: Add basic support for level sensitive SPIs in GICv2Adrien Pesle
For level sensitive interrupt IRQ line must be cleared when interrupt is deasserted. This is not the case for edge-trigerred interrupt. Change-Id: Ib1660da74a296750c0eb9e20878d4ee64bd23130 Reviewed-on: https://gem5-review.googlesource.com/12944 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2018-10-01sim: Extend (UN)SERIALIZE_ARRAY to BitUnionsGiacomo Travaglini
This patch is making it possible to use SERIALIZE_ARRAY and UNSERIALIZE array for serializing arrays of BitUnions. Change-Id: I682766b472585f70a89338f373fb94dff5db53c3 Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-on: https://gem5-review.googlesource.com/12924 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-09-28dev-arm: Make CpuLocalTimer use standard ArmInterruptPinGiacomo Travaglini
Change-Id: I8c4eb9389b47df8cdf1eec966bb2c9da85a7a7c8 Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/12744 Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2018-09-28dev-arm: Take into account PPI enable bitGiacomo Travaglini
When checking for PPIs to send to the cpu in the PL390 GIC we were forwarding any pending PPI regardless of their masking in the distributor. Change-Id: I2e294abeca733cca95cd0deeb9659c7d3d9d8734 Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/12624 Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2018-09-28arch-arm: raise/clear IRQ when writing to PMOVSCLR/SETGiacomo Travaglini
Writing a 1 to the Overflow Flag Status register should trigger an interrupt raise/clear depending on the register we are currently using (PMOVSCLR for clearing and PMOVSSET for raising). Change-Id: I2091456685a245712045cf7a4932ac36b7dded1d Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/12531 Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2018-09-26systemc: Report errors when proc ctrl funcs are called during elab.Gabe Black
Change-Id: I19475b86d04af5b3e4e907d9e24cb15666fb7bb1 Reviewed-on: https://gem5-review.googlesource.com/12274 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-09-26systemc: Abort verify.py if no tests were selected.Gabe Black
The various phases assume there are at least some tests, and if there are none they may try to run malformed commands. Change-Id: I041d35c504da57b830c490651ab1b3c98e0288ca Reviewed-on: https://gem5-review.googlesource.com/12273 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-09-26systemc: Make verify.py run the tests from the directory they expect.Gabe Black
Change-Id: I4c902cd81f7e46f81f601cae0ff2da044ef48f85 Reviewed-on: https://gem5-review.googlesource.com/12272 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-09-26systemc: Add a --working-dir option to the test config.py.Gabe Black
The tests expect to be run from a certain directory. Generally that doesn't matter, but in at least one case the test opens a file with a relative path, and that doesn't work unless CWD is what it expects. Change-Id: I34c0ed975e77daed50ace4f7eebd034bf04c5595 Reviewed-on: https://gem5-review.googlesource.com/12271 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-09-26systemc: Change the test binaries to use rpath.Gabe Black
Use rpath to link the gem5 dynamic library into the systemc test binaries so that they don't have to be run from a particular directory to resolve all their linking dependencies. Change-Id: I66b18c23ae6bbf32a959022f8789fc8bdd3a6c6b Reviewed-on: https://gem5-review.googlesource.com/12270 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-09-26systemc: Handle sc_stop called from sc_main correctly.Gabe Black
When in sc_main, sc_is_running will return true but we're not going to run any gem5 events since we're currently in the sc_main Fiber. In that case, we need to do the sc_stop work inline. If we're actually running and not just paused, then we do still want to schedule the work of sc_stop to happen as its own event since that will happen before returning to sc_main, and actually will likely be the mechanism by which sc_main starts executing again. Change-Id: If9ffafc4f240af0f3d9c726b36a0950b5219dc00 Reviewed-on: https://gem5-review.googlesource.com/12269 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-09-26systemc: Fix some issues with starvation checks.Gabe Black
Make sure we check for starvation after timed notifications and at the very end of delta cycles (after delta notifications, not before). Also reverse the order of starvation checks (whether they apply at all, then if they're satisfied) to make those checks faster. Checking a bool is a lot easier than checking if a bunch of other structures are empty. Change-Id: I514ff219909823f1f424fde69856d6b510655188 Reviewed-on: https://gem5-review.googlesource.com/12268 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-09-26systemc: When sc_start-ing with zero time, ensure the ready event runs.Gabe Black
The ready event is what notices that we only wanted to run one delta cycle, or no delta cycle if there was nothing to do, and return to sc_main. If the ready event wasn't scheduled, we would advance time before the ready event ran and returned to sc_main which is incorrect. Change-Id: Ic3c10a2f1405f744e8c2bd37aa45846ee6e98e12 Reviewed-on: https://gem5-review.googlesource.com/12267 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-09-26systemc: Fix where we checked if sc_stop was called durig elaboration.Gabe Black
If sc_stop is called during one of the various callbacks, that has defined behavior and will cause the simulation to stop after the current batch of callbacks. We were checking whether sc_stop had been called during one of those batches and killing the system, erroneously assuming that meant it had called during elaboration. This change moves the check to before the callbacks which actually does mean that sc_stop was called during elaboration. Change-Id: I6876305450e52a407acffb9a2f45ee2ae24a9adf Reviewed-on: https://gem5-review.googlesource.com/12266 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-09-26systemc: Make sure methods aren't restarted by yield.Gabe Black
Methods may need to yield control to other Processes when throwing them exceptions. In that case, we need to keep track of the fact that the method doesn't need to be restarted when it resumes within yield. Change-Id: I829c387d6ddb563b2957db47e55adadbbe6bc51a Reviewed-on: https://gem5-review.googlesource.com/12265 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-09-26systemc: When a thread completes, yield to the scheduler.Gabe Black
Don't just fall off the end of the fiber and return to gem5. By calling yield, we ensure that remaining Processes are run and that bookkeeping is maintained correctly. Change-Id: Ifbe104e155cad29e40a89767a7c1f986399f784d Reviewed-on: https://gem5-review.googlesource.com/12264 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-09-26systemc: Implement positional binding.Gabe Black
Change-Id: Ifbcd7e4148b82b9bf5241e040e812925daea3705 Reviewed-on: https://gem5-review.googlesource.com/12263 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-09-26systemc: Use sc_assert to check the number of interfaces.Gabe Black
The sc_port code had been using the .at() function of the vector class, but when that failed it threw an exception, and it was very difficult to tell where the exception came from from how gem5 crashed. This change switches to sc_assert (the systemc version of assert) which makes the cause/location of failures much more obvious. Change-Id: I1cd51c86f47b314be551c304b014c44cfa030175 Reviewed-on: https://gem5-review.googlesource.com/12262 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-09-26systemc: Get rid of the unused warning function in sc_event_finder_t.Gabe Black
Change-Id: Id615856af7ea366e499747e00f66924a25623663 Reviewed-on: https://gem5-review.googlesource.com/12261 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-09-26systemc: Use the eq pointer directly less often in the scheduler.Gabe Black
This takes advantage of the utility functions that exist a little better, and also avoids accidentally asymetrically using eventsToSchedule and eq->(de)schedule. Change-Id: I1eb1c228d47684cccb9deaf6f3409b77cfbad4cd Reviewed-on: https://gem5-review.googlesource.com/12260 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-09-26systemc: Make sc_process_b less hokey, and make WAIT* work.Gabe Black
This change puts sc_process_b into the inheritance hierarchy for the Process types. It also adds the nonstandard sc_set_location function and calls it from the nonstandard WAIT* macros. Change-Id: Ic997dcf74d262774dd7b53504146e372e03af2e0 Reviewed-on: https://gem5-review.googlesource.com/12259 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-09-25systemc: Handle null and omitted event names.Gabe Black
If the simulation isn't running, these should be replaced with versions generated by sc_gen_unique_name(). Change-Id: Idd515e73ba17d3dfa866ee5509369e9c4e3fb2f5 Reviewed-on: https://gem5-review.googlesource.com/12258 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-09-25systemc: Handle null sc_object names.Gabe Black
A null pointer for an sc_object name is supposed to be equivalent to an empty string. Change-Id: I6094577ad43f13d47a20bc67fa15f4c04d448fe5 Reviewed-on: https://gem5-review.googlesource.com/12257 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-09-25systemc: Check for time overflow in sc_start.Gabe Black
A regression tests checks this situation. Change-Id: I7716bf7c8cf219c372ab9722fc0ad52e7e674b17 Reviewed-on: https://gem5-review.googlesource.com/12256 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-09-25systemc: Handle sc_time_stamp before any sc_time is constructed.Gabe Black
The time resolution won't yet be fixed, so the scaling factor will still be set to zero. Change-Id: I1d1e58316ee05cc477a31ce90e2bbf56dcbc65c3 Reviewed-on: https://gem5-review.googlesource.com/12255 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-09-25systemc: Make the test config retrieve sc_main results.Gabe Black
Accellera's implementation prints any sc_report which is thrown and escapes sc_main, so we need to do the same to make some tests pass. Arguably gem5 should fail if sc_main reports an error, but verify.py would interpret that as the test failing too, and some tests purposefully generate errors. This change also stops using the logging module. It wasn't really providing any benefit, and added extra decoration to log messages which confused verify.py. Change-Id: I6850d0ada5e477b67527d99d421478586cda93b3 Reviewed-on: https://gem5-review.googlesource.com/12254 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-09-25systemc: Keep track of how sc_main completes and expose that to python.Gabe Black
That makes it possible for the config script to retrieve the result of running sc_main. sc_main (or at least the python front end for it) can't return results directly since it usually doesn't run to completion when it's first called. Change-Id: I9740e9688571e2ca824a684be70480f1eadddcdb Reviewed-on: https://gem5-review.googlesource.com/12253 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-09-25systemc: Make the report handler handle null messages.Gabe Black
It was checking the first character of the message for a null byte, but not whether the message string pointer itself was null. Change-Id: Iddef1e22c35b55c8c898670576ab416dd1023d7c Reviewed-on: https://gem5-review.googlesource.com/12252 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-09-25systemc: If no sc_module_name was used, throw an error.Gabe Black
This is tested by the regression tests. Also make sure the handshake which sets up instances of sc_module is cleaned up if we bail partway through for some reason, for instance if an intermediate class throws an exception as part of its constructor. Change-Id: I89afe5f76832cc132aa2bb8f19916dea64546784 Reviewed-on: https://gem5-review.googlesource.com/12251 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-09-25systemc: If an event is a delta notification, checked if it's timed.Gabe Black
If we're descheduling an event which is at the current time, it may have been scheduled as a delta notification, but it could have also been scheduled as a timed notification and we just got to that point in time. If an event is for the current time but isn't in the delta notifications, this change detects that and then treats it as a timed notification. Change-Id: I1d8f4c40325cc7f355b7f2e6f08611483ce11858 Reviewed-on: https://gem5-review.googlesource.com/12250 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-09-25systemc: If sc_main returns, don't do any more systemc stuff.Gabe Black
When sc_main returns, clear out any pending work in the scheduler and also block the systemc kernel from doing actions which correspond with the start of simulation. It's most likely that work like oustanding timeouts might survive past the end of sc_main, especially if it never officially called sc_stop. It's also possible for sc_main to return and never actually call sc_start. In that case, the kernel should not call callbacks of the various objects (which may no longer even exist), or go through the initialization phase. If sc_main is never called at all, then the kernel's actions aren't gated. Change-Id: I49bf094be3283a92d846d2f3da224950bd893a5c Reviewed-on: https://gem5-review.googlesource.com/12249 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-09-25systemc: Clear out the scheduler more agressively and with common code.Gabe Black
It's be useful/necessary to flush pending activity even when not tearing down the scheduler, specifically when stopping. Change-Id: I6b3716a8ca1f8ca151222e08f30bd3c9a43364b9 Reviewed-on: https://gem5-review.googlesource.com/12248 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-09-25systemc: Override notifyWork for timeout/event_and_list sensitivities.Gabe Black
The notifyWork function for SensitivityEventAndList assumes it's being triggered by an event which is part of its list, but when SensitivityTimeoutAndEventAndList triggers it might be from an event or from a timeout. This change overrides notifyWork for that class and makes it delegate to notifyWork for the subclasses depending on whether there's an event pointer. Change-Id: I598af2b78d71ee9934edea10ca7ac5c88149e3f3 Reviewed-on: https://gem5-review.googlesource.com/12247 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-09-25systemc: Make sure no delta cycles are scheduled when stopping.Gabe Black
If the readyEvent is still scheduled when sc_main completes, gem5 will return to it's main fiber and keep executing events, including that one. That means a delta cycle will run even after sc_main is complete. This change ensures that the readyEvent has been descheduled as part of stopping. Change-Id: I9479ac4ebff3335477b371b02efa6d44c70cbc8e Reviewed-on: https://gem5-review.googlesource.com/12224 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-09-25systemc: Make sure an immediate notification overrides a delayed one.Gabe Black
If an event has a delayed notification pending, that should be cleared if it's later notified immediately. Change-Id: I4272f6b47a41d80756769f3fe69069a00016dbd6 Reviewed-on: https://gem5-review.googlesource.com/12223 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-09-25systemc: Improve scheduler cleanup.Gabe Black
Make the scheduler clear itself out when it's destructed to ensure that nobody will try to use it after it's gone away. Also make sure there are no pending events which might refer to it as well, either systemc events or gem5 events. Change-Id: I12dadc06bd9db7016a8dc0c1827b3e630b0d23d5 Reviewed-on: https://gem5-review.googlesource.com/12222 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-09-25systemc: Implement most of sc_inout.Gabe Black
Because sc_inout needs sc_dt::sc_logic and that probably calls functions from dt_sc_mempool.cc and because those hadn't yet been stubbed out. This change adds stubs for those as well. Change-Id: I544a1669575b594d4612558b8b6f47668ac94414 Reviewed-on: https://gem5-review.googlesource.com/12221 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-09-25systemc: Make sc_out delegate to its base class sc_inout.Gabe Black
The spec says these are essentially identical classes, they just have both so that users can show their intent. Change-Id: I51908edca89acea25891a52bfa7fca0681ccfc5c Reviewed-on: https://gem5-review.googlesource.com/12220 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-09-25systemc: Generalize gem5 style event scheduling.Gabe Black
These events are either scheduled directly, or if no event queue is yet available they're recorded in a map to schedule later. Since this was used in a few places (and should have been used for the ready event), this change moves it into some common functions which remove some duplication and abstract away this detail. Change-Id: I4320d7296f4f72344539b2b4b2564a6a27576dd8 Reviewed-on: https://gem5-review.googlesource.com/12219 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-18 09:35:20 +0000