gem5 - gem5

Age	Commit message (Expand)	Author
2011-07-15	Mem: Fix issue with prefetches originating at non-L1 caches getting stale data	Ali Saidi
2011-07-15	O3: Create a pipeline activity viewer for the O3 CPU model.	Giacomo Gabrielli
2011-07-15	ARM: Fix SWP/SWPB undefined instruction behavior	Wade Walker
2011-07-15	ARM: Add two unimplemented miscellaneous registers.	Wade Walker
2011-07-11	X86: implements copyRegs() function	Nilay Vaish
2011-07-11	ISA: Get rid of the unused mem_acc_type template parameter.	Gabe Black
2011-07-10	Branch predictor: Fixes the tournament branch predictor.	Mrinmoy Ghosh
2011-07-10	O3: Fix up pipelining icache accesses in fetch stage to function properly	Geoffrey Blake
2011-07-10	IO: Handle case where ISA Fake device is being used as a fake memory.	Ali Saidi
2011-07-10	O3: Make sure fetch doesn't go off into the weeds during speculation.	Ali Saidi
2011-07-10	Config: Add support for a Self.all proxy object	Ali Saidi
2011-07-10	ARM: Fix mp interrupt bug in GIC.	Daniel Johnson
2011-07-07	alpha:hwrei:rollback for o3	Korey Sewell
2011-07-06	ruby: added generic dma machine	Brad Beckmann
2011-07-06	MOESI_hammer: Fixed uniprocessor DMA bug	Brad Beckmann
2011-07-05	slicc: add a protocol statement and an include statement	Nathan Binkert
2011-07-05	slicc: cleanup slicc code and make it less verbose	Nathan Binkert
2011-07-05	grammar: better encapsulation of a grammar and parsing	Nathan Binkert
2011-07-05	ISAs: Streamline some spots where Mem is used in the ISA descriptions.	Gabe Black
2011-07-05	ISA parser: Define operand types with a ctype directly.	Gabe Black
2011-07-05	ISA parser: Simplify operand type handling.	Gabe Black
2011-07-03	Merged with Gabe's recent changes.	Nilay Vaish
2011-07-03	Network_test: Conform it with functional access changes in Ruby	Nilay Vaish
2011-07-02	ExecContext: Rename the readBytes/writeBytes functions to readMem and writeMem.	Gabe Black
2011-07-02	ExecContext: Get rid of the now unused read/write templated functions.	Gabe Black
2011-07-02	ISA: Use readBytes/writeBytes for all instruction level memory operations.	Gabe Black
2011-07-02	X86: Fix store microops so they don't drop faults in timing mode.	Gabe Black
2011-07-01	Ruby: Commit files missing from previous commit	Nilay Vaish
2011-06-30	Ruby: Add support for functional accesses	Brad Beckmann ext:(%2C%20Nilay%20Vaish%20%3Cnilay%40cs.wisc.edu%3E)
2011-06-28	arch: print next upc correctly	Nilay Vaish
2011-06-24	Ruby: remove unused functions in CacheMemory: get/setMemoryValue	Joel Hestness
2011-06-22	mips: fix nmsub and nmadd definitions	Deyaun Guo
2011-06-21	X86: Eliminate an unused argument for building store microops.	Gabe Black
2011-06-20	InOder: Fix a compile error.	Gabe Black
2011-06-19	inorder: clear reg. dep entry after removing from list	Korey Sewell
2011-06-19	inorder: se: squash after syscalls	Korey Sewell
2011-06-19	inorder: cleanup dprintfs in cache unit	Korey Sewell
2011-06-19	inorder: SE mode TLB faults	Korey Sewell
2011-06-19	inorder:tracing: fix fault tracing bug	Korey Sewell
2011-06-19	inorder: se compile fixes	Korey Sewell
2011-06-19	inorder: add necessary debug flag header files	Korey Sewell
2011-06-19	mips: mark unaligned access flag as true	Korey Sewell
2011-06-19	inorder: clear fetchbuffer on traps	Korey Sewell
2011-06-19	inorder: use separate float-reg bits function in dyninst	Korey Sewell
2011-06-19	inorder: use trapPending flag to manage traps	Korey Sewell
2011-06-19	inorder/dtb: make sure DTB translate correct address	Korey Sewell
2011-06-19	inorder: handle serializing instructions	Korey Sewell
2011-06-19	alpha: fix warn_once for prefetches	Korey Sewell
2011-06-19	alpha: naming for dtb faults	Korey Sewell
2011-06-19	inorder: dont handle multiple faults on same cycle	Korey Sewell